Lines Matching defs:cache
37 * The hat layer manages the address translation hardware as a cache
332 * kmem_cache, and thus they will be sequential within that cache. In
572 int cache; /* describes system cache */
1144 * Since we only use the tsb8k cache to "borrow" pages for TSBs
1146 * specified, don't use magazines to cache them--we want to return
1229 * typically 8K we have a kmem cache we stack on top of each
2268 * page pointer it can't cache memory.
3158 if (!remap && (cache & CACHE_VAC) && !PP_ISNC(pp)) {
3559 * we just flush the cache and change the color.
3561 * entire cache of that color and set a flag.
4203 * cache the id_t returned for use in setting up and tearing down callbacks.
6035 * from the virtual cache at this point in
6036 * order to prevent a potential cache alias
6044 * has been read into the cache.
6049 * flush the data cache when we unload we will
7225 * We need to flush the page from the virtual cache
7226 * in order to prevent a virtual cache alias
7232 * been read into the cache.
7237 * the data cache when we unload we will get
9041 if (!(cache & CACHE_VAC) || PP_NEWPAGE(pp)) {
9061 if (cache & CACHE_VAC) {
9105 * we just flush the cache and change the color.
9192 * cache here.
9214 * conflict, we re-cache only this page.
9300 ASSERT(!(cache & CACHE_WRITEBACK));
9374 ASSERT(!(cache & CACHE_WRITEBACK));
9452 * We need to flush the cache in all cpus. It is possible that
9537 * all cache entries belonging to this pfn are
12224 * cache. Our ctx stealer only flushes the TLBs.
12495 * We need to flush the cache in all cpus. It is possible that
13469 * We want to prefetch 7 cache lines ahead for our read prefetch. This gives
15489 * this hmeblk. TSB miss handlers that still cache this hmeblk in a register