Lines Matching defs:reg
464 x86_error_reg_t *reg;
491 reg = tbl->error_regs;
492 for (j = 0; j < tbl->error_regs_len; j++, reg++) {
495 switch (reg->size) {
498 reg->offset);
500 ((data & reg->mask) | reg->value2) :
501 ((data & reg->mask) | reg->value1));
502 pci_config_put32(cfg_hdl, reg->offset, value);
504 reg->offset);
508 reg->offset);
510 ((data & reg->mask) | reg->value2) :
511 ((data & reg->mask) | reg->value1));
512 pci_config_put16(cfg_hdl, reg->offset,
515 reg->offset);
519 reg->offset);
521 ((data & reg->mask) | reg->value2) :
522 ((data & reg->mask) | reg->value1));
523 pci_config_put8(cfg_hdl, reg->offset,
526 reg->offset);
532 "0x%x\n", bdf, mcheck, reg->size, reg->offset,
533 reg->mask, (mcheck ? reg->value2 : reg->value1),
622 * Intel and PLX switches require SERR in CMD reg to foward error
625 * when the CMD reg has SERR enabled (which is expected according to