Cross Reference: /illumos-gate/usr/src/uts/intel/io/amd8111s/amd8111s

Lines Matching defs:MemBaseAddress
219 	ULONG MemBaseAddress;
221 	MemBaseAddress = pLayerPointers->pMdl->Mem_Address;
224 	WRITE_REG16(pLayerPointers, MemBaseAddress + AUTOPOLL0, 0x8101);
227 	WRITE_REG32(pLayerPointers, MemBaseAddress + RCV_RING_BASE_ADDR0, 0);
228 	WRITE_REG32(pLayerPointers, MemBaseAddress + RCV_RING_BASE_ADDR1, 0);
229 	WRITE_REG32(pLayerPointers, MemBaseAddress + RCV_RING_BASE_ADDR0, 0);
230 	WRITE_REG32(pLayerPointers, MemBaseAddress + RCV_RING_BASE_ADDR2, 0);
231 	WRITE_REG32(pLayerPointers, MemBaseAddress + RCV_RING_BASE_ADDR3, 0);
234 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_BASE_ADDR0, 0);
235 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_BASE_ADDR1, 0);
236 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_BASE_ADDR2, 0);
237 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_BASE_ADDR3, 0);
240 	WRITE_REG32(pLayerPointers, MemBaseAddress + CMD0, 0x000F0F7F);
241 	WRITE_REG32(pLayerPointers, MemBaseAddress + CMD2, 0x3F7F3F7F);
244 	WRITE_REG32(pLayerPointers, MemBaseAddress + CMD3, VAL1 | EN_PMGR);
247 	WRITE_REG32(pLayerPointers, MemBaseAddress + CMD7, 0x1B);
250 	WRITE_REG32(pLayerPointers, MemBaseAddress + CTRL1, XMTSP_MASK);
253 	WRITE_REG32(pLayerPointers, MemBaseAddress + DLY_INT_A, 0);
254 	WRITE_REG32(pLayerPointers, MemBaseAddress + DLY_INT_B, 0);
257 	WRITE_REG32(pLayerPointers, MemBaseAddress + FLOW_CONTROL, 0);
260 	data32 = READ_REG32(pLayerPointers, MemBaseAddress + INT0);
261 	WRITE_REG32(pLayerPointers, MemBaseAddress + INT0, data32);
264 	WRITE_REG32(pLayerPointers, MemBaseAddress + STVAL, 0);
267 	WRITE_REG32(pLayerPointers, MemBaseAddress + INTEN0, 0x1F7F7F1F);
270 	WRITE_REG32(pLayerPointers, MemBaseAddress + LADRF1, 0);
271 	WRITE_REG32(pLayerPointers, MemBaseAddress + LADRF1 + 4, 0);
274 	WRITE_REG32(pLayerPointers, MemBaseAddress + LED0, 0);
275 	WRITE_REG32(pLayerPointers, MemBaseAddress + LED1, 0);
276 	WRITE_REG32(pLayerPointers, MemBaseAddress + LED2, 0);
277 	WRITE_REG32(pLayerPointers, MemBaseAddress + LED3, 0);
280 	WRITE_REG16(pLayerPointers, MemBaseAddress + RCV_RING_CFG, 1);
284 		WRITE_REG32(pLayerPointers, MemBaseAddress + SRAM_SIZE,
287 		WRITE_REG32(pLayerPointers, MemBaseAddress + SRAM_SIZE,
292 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_LEN0, 0);
293 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_LEN1, 0);
294 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_LEN2, 0);
295 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_LEN3, 0);
298 	WRITE_REG32(pLayerPointers, MemBaseAddress + XMT_RING_LIMIT, 0);
300 	WRITE_REG16(pLayerPointers, MemBaseAddress + MIB_ADDR, MIB_CLEAR);
1661 	long MemBaseAddress = pLayerPointers->pMdl->Mem_Address;
1680 		WRITE_REG32(pLayerPointers, MemBaseAddress + DLY_INT_A,
1685 		WRITE_REG32(pLayerPointers, MemBaseAddress + STVAL, 0);
1689 		WRITE_REG32(pLayerPointers, MemBaseAddress + DLY_INT_A, 0);
1690 		WRITE_REG32(pLayerPointers, MemBaseAddress + DLY_INT_B, 0);