Lines Matching refs:MMIO_BASE
66 #define MMIO_BASE(x) (x)->agpm_data.agpm_gtt.gtt_mmio_base
75 ddi_put32(MMIO_HANDLE(x), (uint32_t *)(MMIO_BASE(x) + (off)), (val));
78 ddi_get32(MMIO_HANDLE(x), (uint32_t *)(MMIO_BASE(x) + (off)));
275 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access,
284 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access,
290 MMIO_BASE(agpmaster) + GM45_GTT_OFFSET;
293 MMIO_BASE(agpmaster) + I965_GTT_OFFSET;
306 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access,
316 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access,
320 GTT_ADDR(agpmaster) = MMIO_BASE(agpmaster) + I8XX_PTE_OFFSET;
346 (void *)GTT_ADDR(agpmaster), (void *)MMIO_BASE(agpmaster)));