Cross Reference: /illumos-gate/usr/src/uts/intel/ia32/os/fpu.c

Lines Matching refs:fp
54 #include <sys/fp.h>
179 	struct fpu_ctx *fp;		/* parent fpu context */
189 	fp = &t->t_lwp->lwp_pcb.pcb_fpu;
196 	fp_save(fp);
205 		fn = &fp->fpu_regs.kfpu_u.kfpu_fn;
212 		fx = &fp->fpu_regs.kfpu_u.kfpu_fx;
220 		cfp->fpu_xsave_mask = fp->fpu_xsave_mask;
222 		fx = &fp->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave;
251  *	fp context belongs to a thread on deathrow
256  *	fp context belongs to the current thread
261  *	disable fpu and release the fp context for the CPU
266 fp_free(struct fpu_ctx *fp, int isexec)
270 	if (fp->fpu_flags & FPU_VALID)
278 	fp->fpu_flags |= FPU_VALID;
280 	if (curthread->t_lwp && fp == &curthread->t_lwp->lwp_pcb.pcb_fpu) {
294 fp_save(struct fpu_ctx *fp)
299 	if (!fp || fp->fpu_flags & FPU_VALID) {
303 	ASSERT(curthread->t_lwp && fp == &curthread->t_lwp->lwp_pcb.pcb_fpu);
308 		fpsave(&fp->fpu_regs.kfpu_u.kfpu_fn);
312 		fpxsave(&fp->fpu_regs.kfpu_u.kfpu_fx);
316 		xsave(&fp->fpu_regs.kfpu_u.kfpu_xs, fp->fpu_xsave_mask);
323 	fp->fpu_flags |= FPU_VALID;
334 fp_restore(struct fpu_ctx *fp)
339 		fprestore(&fp->fpu_regs.kfpu_u.kfpu_fn);
343 		fpxrestore(&fp->fpu_regs.kfpu_u.kfpu_fx);
347 		xrestore(&fp->fpu_regs.kfpu_u.kfpu_xs, fp->fpu_xsave_mask);
354 	fp->fpu_flags &= ~FPU_VALID;
367 	struct fpu_ctx *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
370 	ASSERT((fp->fpu_flags & FPU_EN) == 0);
376 		fp->fpu_xsave_mask = get_xcr(XFEATURE_ENABLED_MASK) &
380 	installctx(curthread, fp,
388 	if (fp->fpu_flags & FPU_VALID)
389 		fp_restore(fp);
391 	ASSERT((fp->fpu_flags & FPU_VALID) == 0);
392 	fp->fpu_flags = FPU_EN;
409 	struct fpu_ctx *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
426 	ASSERT(((uintptr_t)(&fp->fpu_regs.kfpu_u.kfpu_fx) & 0xf) == 0);
431 	 * (NOTE: fp-no-coprocessor comes thru interrupt gate)
475 	if (fp->fpu_flags & FPU_EN) {
477 		fp_restore(fp);
522 	fpu_ctx_t *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
528 	 * (NOTE: x87 fp exceptions come thru interrupt gate)
543 	fp_save(fp);
549 		fpsw = fp->fpu_regs.kfpu_u.kfpu_fn.f_fsw;
550 		fpcw = fp->fpu_regs.kfpu_u.kfpu_fn.f_fcw;
551 		fp->fpu_regs.kfpu_u.kfpu_fn.f_fsw &= ~FPS_SW_EFLAGS;
556 		fpsw = fp->fpu_regs.kfpu_u.kfpu_fx.fx_fsw;
557 		fpcw = fp->fpu_regs.kfpu_u.kfpu_fx.fx_fcw;
558 		fp->fpu_regs.kfpu_u.kfpu_fx.fx_fsw &= ~FPS_SW_EFLAGS;
562 		fpsw = fp->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave.fx_fsw;
563 		fpcw = fp->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave.fx_fcw;
564 		fp->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave.fx_fsw &= ~FPS_SW_EFLAGS;
569 		fp->fpu_regs.kfpu_u.kfpu_xs.xs_xstate_bv |= XFEATURE_LEGACY_FP;
576 	fp->fpu_regs.kfpu_status = fpsw;
597 	fpu_ctx_t *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
621 	fp_save(fp); 		/* save the FPU state */
623 	mxcsr = fp->fpu_regs.kfpu_u.kfpu_fx.fx_mxcsr;
625 	fp->fpu_regs.kfpu_status = fp->fpu_regs.kfpu_u.kfpu_fx.fx_fsw;
627 	fp->fpu_regs.kfpu_xstatus = mxcsr;
699 	struct fpu_ctx *fp = &curthread->t_lwp->lwp_pcb.pcb_fpu;
705 	if ((fp->fpu_flags & FPU_EN) == 0) {
726 	 * pcb, then modify that copy.  Next use of the fp will
729 	fp_save(fp);
734 		fp->fpu_regs.kfpu_u.kfpu_fn.f_fcw = fcw;
738 		fx = &fp->fpu_regs.kfpu_u.kfpu_fx;
744 		fx = &fp->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave;
751 		fp->fpu_regs.kfpu_u.kfpu_xs.xs_xstate_bv |= XFEATURE_LEGACY_FP;