Lines Matching defs:slave
455 * If the slave is discovered to have a skew, gethrtimef will be changed to
457 * the master and slave TSCs are read simultaneously; however, there is no
460 * management. The slave CPU continuously reads TSC and then reads a global
462 * the slave's visibility (being forced by an mfence operation) we use the TSC
463 * reading taken on the slave. A corresponding TSC read will be taken on the
465 * delay between causing the slave to notice the invalid cache line and the
482 tsc_sync_master(processorid_t slave)
521 * after the slave noticed the cache line
528 tsc_sync_tick_delta[slave] =
583 * if the master and slave are really the same
585 * to yield to the slave as quickly as possible here,