Lines Matching refs:cp
144 cpupm_init(cpu_t *cp)
149 struct machcpu *mcpu = &(cp->cpu_m);
155 mach_state = cp->cpu_m.mcpu_pm_mach_state =
160 mach_state->ms_acpi_handle = cpu_acpi_init(cp);
162 cpupm_fini(cp);
164 "unable to get ACPI handle", cp->cpu_id);
177 if (vendors->cpuv_init(cp))
185 cpupm_fini(cp);
195 ret = mach_state->ms_pstate.cma_ops->cpus_init(cp);
200 nspeeds = cpupm_get_speeds(cp, &speeds);
203 " no speeds to manage", cp->cpu_id);
205 cpupm_set_supp_freqs(cp, speeds, nspeeds);
215 ret = mach_state->ms_tstate.cma_ops->cpus_init(cp);
230 ret = mach_state->ms_cstate.cma_ops->cpus_init(cp);
243 cp->cpu_m.mcpu_idle_cpu = cpu_acpi_idle;
262 cpupm_fini(cp);
277 cpupm_throttle_manage_notification(cp);
280 cpuidle_manage_cstates(cp);
283 cpupm_power_manage_notifications(cp);
285 cpupm_add_notify_handler(cp, cpupm_event_notify_handler, cp);
296 cpupm_free(cpu_t *cp, boolean_t cpupm_stop)
300 (cpupm_mach_state_t *)cp->cpu_m.mcpu_pm_mach_state;
307 mach_state->ms_pstate.cma_ops->cpus_stop(cp);
309 mach_state->ms_pstate.cma_ops->cpus_fini(cp);
315 mach_state->ms_tstate.cma_ops->cpus_stop(cp);
317 mach_state->ms_tstate.cma_ops->cpus_fini(cp);
323 mach_state->ms_cstate.cma_ops->cpus_stop(cp);
325 mach_state->ms_cstate.cma_ops->cpus_fini(cp);
330 cpupm_free_notify_handlers(cp);
339 cp->cpu_m.mcpu_pm_mach_state = NULL;
344 cpupm_fini(cpu_t *cp)
350 cpupm_free(cp, B_FALSE);
354 cpupm_start(cpu_t *cp)
356 cpupm_init(cp);
360 cpupm_stop(cpu_t *cp)
366 cpupm_free(cp, B_TRUE);
374 cpupm_is_ready(cpu_t *cp)
378 (cpupm_mach_state_t *)cp->cpu_m.mcpu_pm_mach_state;
391 _NOTE(ARGUNUSED(cp));
425 cpupm_alloc_domains(cpu_t *cp, int state)
428 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
443 domain = cpuid_get_chipid(cp);
446 domain = cpuid_get_chipid(cp);
460 domain = cpuid_get_chipid(cp);
463 domain = cpuid_get_chipid(cp);
477 domain = cpuid_get_coreid(cp);
480 domain = cpuid_get_coreid(cp);
508 CPUSET_ADD(dptr->pm_cpus, cp->cpu_id);
535 cpupm_remove_domains(cpu_t *cp, int state, cpupm_state_domains_t **dom_ptr)
538 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
578 if (CPU_IN_SET(dptr->pm_cpus, cp->cpu_id))
579 CPUSET_DEL(dptr->pm_cpus, cp->cpu_id);
584 cpupm_alloc_ms_cstate(cpu_t *cp)
589 mach_state = (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
598 cpupm_free_ms_cstate(cpu_t *cp)
601 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
611 cpupm_state_change(cpu_t *cp, int level, int state)
614 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
619 DTRACE_PROBE2(cpupm__state__change, cpu_t *, cp, int, level);
643 CPUSET_ONLY(set, cp->cpu_id);
671 cpupm_plat_domain_id(cpu_t *cp, cpupm_dtype_t type)
674 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
700 cpupm_plat_state_enumerate(cpu_t *cp, cpupm_dtype_t type,
712 nspeeds = cpupm_get_speeds(cp, &speeds);
730 cpupm_plat_change_state(cpu_t *cp, cpupm_state_t *state)
732 if (!cpupm_is_ready(cp))
735 cpupm_state_change(cp, (int)state->cps_handle, CPUPM_P_STATES);
747 cpupm_get_speeds(cpu_t *cp, int **speeds)
751 (cpupm_mach_state_t *)cp->cpu_m.mcpu_pm_mach_state;
771 cpupm_power_ready(cpu_t *cp)
773 return (cpupm_is_enabled(CPUPM_P_STATES) && cpupm_is_ready(cp));
780 cpupm_throttle_ready(cpu_t *cp)
782 return (cpupm_is_enabled(CPUPM_T_STATES) && cpupm_is_ready(cp));
789 cpupm_cstate_ready(cpu_t *cp)
791 return (cpupm_is_enabled(CPUPM_C_STATES) && cpupm_is_ready(cp));
797 cpu_t *cp = ctx;
799 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
812 cpupm_add_notify_handler(cpu_t *cp, CPUPM_NOTIFY_HANDLER handler, void *ctx)
816 (cpupm_mach_state_t *)cp->cpu_m.mcpu_pm_mach_state;
827 cpupm_notify_handler, cp);
839 cpupm_free_notify_handlers(cpu_t *cp)
843 (cpupm_mach_state_t *)cp->cpu_m.mcpu_pm_mach_state;
872 cpupm_get_top_speed(cpu_t *cp)
882 (cpupm_mach_state_t *)cp->cpu_m.mcpu_pm_mach_state;
893 "_PPC out of range %d", cp->cpu_id, plat_level);
914 cpu_t *cp = ctx;
917 top_speed = cpupm_get_top_speed(cp);
918 cpupm_redefine_max_activepwr_state(cp, top_speed);
927 cpu_t *cp = ctx;
929 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);