Lines Matching refs:feature

68  * Pass 0 of cpuid feature analysis happens in locore. It contains special code
70 * them accordingly. For most modern processors, feature detection occurs here
73 * Pass 1 of cpuid feature analysis happens just at the beginning of mlsetup()
82 * o Processing the feature flags returned by the cpuid instruction while
84 * o Mapping the feature flags into Solaris feature bits (X86_*).
85 * o Processing extended feature flags if supported by the processor,
93 * Pass 2 of cpuid feature analysis happens just at the beginning
96 * need for pass1 feature analysis, and extended cpuid functions beyond the
97 * simple feature processing done in pass1.
180 is_x86_feature(void *featureset, uint_t feature)
182 ASSERT(feature < NUM_X86_FEATURES);
183 return (BT_TEST((ulong_t *)featureset, feature));
187 add_x86_feature(void *featureset, uint_t feature)
189 ASSERT(feature < NUM_X86_FEATURES);
190 BT_SET((ulong_t *)featureset, feature);
194 remove_x86_feature(void *featureset, uint_t feature)
196 ASSERT(feature < NUM_X86_FEATURES);
197 BT_CLEAR((ulong_t *)featureset, feature);
263 * This structure contains HW feature bits and size of the xsave save area.
340 * supported feature information
735 cpuid_intel_getids(cpu_t *cpu, void *feature)
748 if (is_x86_feature(feature, X86FSET_CMP)) {
784 } else if (is_x86_feature(feature, X86FSET_HTT)) {
822 * share I$ and L2 caches and the FPU. Enumeration of this feature is
824 * the X86 feature X86FSET_TOPOEXT.
926 * Setup XFeature_Enabled_Mask register. Required by xsave feature.
1030 * - believe %edx feature word
1031 * - ignore %ecx feature word
1221 * to the feature words, then map the kernel's view
1222 * of these feature words into its feature word.
1260 * include it in the feature set and thus generate a mismatched
1261 * x86 feature set across CPUs. Note that at this time we only
1460 * Work on the "extended" feature information, doing
1527 * Compute the additions to the kernel's feature word.
2029 * we should disable the feature, on a non-boot
2447 * feature brand string (0x80000002, 0x80000003, 0x80000004)
2683 * the hardware feature support and kernel support for those features into
2761 * Now map the supported feature vector to things that we
2886 * Now map the supported feature vector to
3611 /* assert that osvw feature setting is consistent on all cpus */
4694 * Setup necessary registers to enable XSAVE feature on this processor.
4753 * Check support for Intel ENERGY_PERF_BIAS feature