Lines Matching defs:eax
283 #define NMAX_CPI_STD 8 /* eax = 0 .. 7 */
284 #define NMAX_CPI_EXTD 0x1f /* eax = 0x80000000 .. 0x8000001e */
307 uint_t cpi_maxeax; /* fn 0: %eax */
321 uint_t cpi_ncpu_shr_last_cache; /* fn 4: %eax: ncpus sharing cache */
322 id_t cpi_last_lvl_cacheid; /* fn 4: %eax: derived cache id */
329 uint_t cpi_xmaxeax; /* fn 0x80000000: %eax */
331 uint8_t cpi_pabits; /* fn 0x80000006: %eax */
332 uint8_t cpi_vabits; /* fn 0x80000006: %eax */
338 /* Intel: fn 4: %eax[31-26] */
490 platform_cpuid_mangle(uint_t vendor, uint32_t eax, struct cpuid_regs *cp)
492 switch (eax) {
523 switch (eax) {
535 switch (eax) {
556 #define platform_cpuid_mangle(vendor, eax, cp) /* nothing */
683 * Xen signature in %ebx, %ecx, and %edx. %eax contains the maximum
1805 * "the lower 8 bits of the %eax register
3382 uint_t eax;
3394 eax = cpi->cpi_std[1].cp_eax;
3396 #define SH_B0(eax) (eax == 0xf40 || eax == 0xf50)
3397 #define SH_B3(eax) (eax == 0xf51)
3398 #define B(eax) (SH_B0(eax) || SH_B3(eax))
3400 #define SH_C0(eax) (eax == 0xf48 || eax == 0xf58)
3402 #define SH_CG(eax) (eax == 0xf4a || eax == 0xf5a || eax == 0xf7a)
3403 #define DH_CG(eax) (eax == 0xfc0 || eax == 0xfe0 || eax == 0xff0)
3404 #define CH_CG(eax) (eax == 0xf82 || eax == 0xfb2)
3405 #define CG(eax) (SH_CG(eax) || DH_CG(eax) || CH_CG(eax))
3407 #define SH_D0(eax) (eax == 0x10f40 || eax == 0x10f50 || eax == 0x10f70)
3408 #define DH_D0(eax) (eax == 0x10fc0 || eax == 0x10ff0)
3409 #define CH_D0(eax) (eax == 0x10f80 || eax == 0x10fb0)
3410 #define D0(eax) (SH_D0(eax) || DH_D0(eax) || CH_D0(eax))
3412 #define SH_E0(eax) (eax == 0x20f50 || eax == 0x20f40 || eax == 0x20f70)
3413 #define JH_E1(eax) (eax == 0x20f10) /* JH8_E0 had 0x20f30 */
3414 #define DH_E3(eax) (eax == 0x20fc0 || eax == 0x20ff0)
3415 #define SH_E4(eax) (eax == 0x20f51 || eax == 0x20f71)
3416 #define BH_E4(eax) (eax == 0x20fb1)
3417 #define SH_E5(eax) (eax == 0x20f42)
3418 #define DH_E6(eax) (eax == 0x20ff2 || eax == 0x20fc2)
3419 #define JH_E6(eax) (eax == 0x20f12 || eax == 0x20f32)
3420 #define EX(eax) (SH_E0(eax) || JH_E1(eax) || DH_E3(eax) || \
3421 SH_E4(eax) || BH_E4(eax) || SH_E5(eax) || \
3422 DH_E6(eax) || JH_E6(eax))
3424 #define DR_AX(eax) (eax == 0x100f00 || eax == 0x100f01 || eax == 0x100f02)
3425 #define DR_B0(eax) (eax == 0x100f20)
3426 #define DR_B1(eax) (eax == 0x100f21)
3427 #define DR_BA(eax) (eax == 0x100f2a)
3428 #define DR_B2(eax) (eax == 0x100f22)
3429 #define DR_B3(eax) (eax == 0x100f23)
3430 #define RB_C0(eax) (eax == 0x100f40)
3436 return (B(eax) || SH_C0(eax) || CG(eax));
3438 return (B(eax));
3442 return (B(eax));
3455 return (B(eax));
3457 return (SH_B0(eax));
3459 return (B(eax));
3463 return (B(eax));
3467 return (B(eax) || SH_C0(eax));
3469 return (B(eax) || SH_C0(eax) || CG(eax) || D0(eax) || EX(eax));
3473 return (B(eax));
3475 return (B(eax) || SH_C0(eax) || CG(eax));
3479 return (SH_C0(eax) || CG(eax));
3484 return (B(eax) || SH_C0(eax));
3489 return (B(eax) || SH_C0(eax) || CG(eax));
3492 return (B(eax) || SH_C0(eax));
3494 return (SH_C0(eax));
3496 return (B(eax) || SH_C0(eax) || CG(eax));
3501 return (B(eax) || SH_C0(eax));
3504 return (B(eax) || SH_C0(eax) || CG(eax));
3507 return (SH_C0(eax) || CG(eax));
3509 return (B(eax) || SH_C0(eax) || CG(eax) || D0(eax));
3511 return (B(eax) || SH_C0(eax));
3514 return (B(eax) || SH_C0(eax) || CG(eax) || D0(eax));
3516 return (SH_C0(eax) || CG(eax) || D0(eax));
3520 return (B(eax) || SH_C0(eax) || CG(eax) || D0(eax));
3522 return (DH_CG(eax));
3524 return (SH_C0(eax) || CG(eax) || D0(eax));
3526 return (D0(eax) || EX(eax));
3528 return (CG(eax));
3530 return (B(eax) || SH_C0(eax) || CG(eax) || D0(eax) || EX(eax));
3532 return (eax == 0x20fc0);
3534 return (SH_E0(eax) || JH_E1(eax) || DH_E3(eax));
3536 return (SH_E0(eax) || JH_E1(eax));
3538 return (SH_E0(eax) || JH_E1(eax) || DH_E3(eax));
3540 return (B(eax) || SH_C0(eax) || CG(eax) || D0(eax));
3542 return (SH_E0(eax) || JH_E1(eax) || SH_E4(eax) || BH_E4(eax) ||
3543 JH_E6(eax));
3545 return (B(eax) || SH_C0(eax) || CG(eax) || D0(eax) || EX(eax));
3549 return (JH_E1(eax) || BH_E4(eax) || JH_E6(eax));
3565 return (((((eax >> 12) & 0xff00) + (eax & 0xf00)) |
3566 (((eax >> 4) & 0xf) | ((eax >> 12) & 0xf0))) < 0xf40);
3576 return (DR_AX(eax) || DR_B0(eax) || DR_B1(eax) || DR_BA(eax) ||
3577 DR_B2(eax) || RB_C0(eax));