Lines Matching defs:prg
81 static int pcitool_cfg_access(pcitool_reg_t *prg, boolean_t write_flag,
83 static int pcitool_io_access(pcitool_reg_t *prg, boolean_t write_flag);
84 static int pcitool_mem_access(pcitool_reg_t *prg, uint64_t virt_addr,
580 /* Access device. prg is modified. */
582 pcitool_cfg_access(pcitool_reg_t *prg, boolean_t write_flag,
585 int size = PCITOOL_ACC_ATTR_SIZE(prg->acc_attr);
586 boolean_t big_endian = PCITOOL_ACC_IS_BIG_ENDIAN(prg->acc_attr);
593 prg->status = PCITOOL_INVALID_SIZE;
607 if (prg->offset + size - 1 > max_offset) {
608 prg->status = PCITOOL_INVALID_ADDRESS;
612 prg->status = PCITOOL_SUCCESS;
615 req.bdf = PCI_GETBDF(prg->bus_no, prg->dev_no, prg->func_no);
616 req.offset = prg->offset;
622 local_data = pcitool_swap_endian(prg->data, size);
624 local_data = prg->data;
645 prg->data =
648 prg->data = local_data;
655 if (req.ioacc && (prg->offset + size - 1 > 0xFF)) {
656 prg->status = PCITOOL_INVALID_ADDRESS;
661 prg->phys_addr = 0;
663 prg->phys_addr = mcfg_mem_base + prg->offset +
664 ((prg->bus_no << PCIEX_REG_BUS_SHIFT) |
665 (prg->dev_no << PCIEX_REG_DEV_SHIFT) |
666 (prg->func_no << PCIEX_REG_FUNC_SHIFT));
673 pcitool_io_access(pcitool_reg_t *prg, boolean_t write_flag)
675 int port = (int)prg->phys_addr;
676 size_t size = PCITOOL_ACC_ATTR_SIZE(prg->acc_attr);
677 boolean_t big_endian = PCITOOL_ACC_IS_BIG_ENDIAN(prg->acc_attr);
695 prg->status = PCITOOL_INVALID_ADDRESS;
702 local_data = pcitool_swap_endian(prg->data, size);
704 local_data = prg->data;
723 prg->status = PCITOOL_INVALID_SIZE;
743 prg->status = PCITOOL_INVALID_SIZE;
749 prg->data =
752 prg->data = local_data;
762 pcitool_mem_access(pcitool_reg_t *prg, uint64_t virt_addr, boolean_t write_flag)
764 size_t size = PCITOOL_ACC_ATTR_SIZE(prg->acc_attr);
765 boolean_t big_endian = PCITOOL_ACC_IS_BIG_ENDIAN(prg->acc_attr);
782 prg->status = PCITOOL_INVALID_ADDRESS;
789 local_data = pcitool_swap_endian(prg->data, size);
791 local_data = prg->data;
809 prg->status = PCITOOL_INVALID_SIZE;
828 prg->status = PCITOOL_INVALID_SIZE;
834 prg->data =
837 prg->data = local_data;
938 pcitool_reg_t prg;
953 if (ddi_copyin(arg, &prg, sizeof (pcitool_reg_t), mode) !=
960 if (prg.barnum >= (sizeof (pci_bars) / sizeof (pci_bars[0]))) {
961 prg.status = PCITOOL_OUT_OF_RANGE;
968 prg.bus_no, prg.dev_no, prg.func_no);
970 if (((prg.bus_no &
972 prg.bus_no) ||
973 ((prg.dev_no &
975 prg.dev_no) ||
976 ((prg.func_no &
978 prg.func_no)) {
979 prg.status = PCITOOL_INVALID_ADDRESS;
984 size = PCITOOL_ACC_ATTR_SIZE(prg.acc_attr);
987 if (prg.barnum == 0) {
993 prg.offset, prg.phys_addr);
995 if (prg.offset >= max_cfg_size) {
996 prg.status = PCITOOL_OUT_OF_RANGE;
1003 rval = pcitool_cfg_access(&prg, write_flag, io_access);
1007 prg.data);
1013 bcopy(&prg, &prg2, sizeof (pcitool_reg_t));
1030 * BAR desired. prg.status is modified on error.
1036 prg.status = prg2.status;
1052 prg.status = PCITOOL_INVALID_ADDRESS;
1059 prg.status = PCITOOL_INVALID_ADDRESS;
1074 prg.phys_addr = prg2.data + prg.offset;
1076 rval = pcitool_io_access(&prg, write_flag);
1104 prg.status = PCITOOL_OUT_OF_RANGE;
1117 prg.status = prg2.status;
1122 prg.status = PCITOOL_INVALID_ADDRESS;
1123 prg.status = EFAULT;
1144 prg.status = PCITOOL_ROM_WRITE;
1150 prg.status =
1169 prg2.data, base_addr, prg.offset);
1173 * Note that prg.status is modified on error.
1175 prg.phys_addr = base_addr + prg.offset;
1177 virt_addr = pcitool_map(prg.phys_addr, size,
1180 prg.status = PCITOOL_IO_ERROR;
1185 rval = pcitool_mem_access(&prg, virt_addr, write_flag);
1189 prg.drvr_version = PCITOOL_VERSION;
1190 if (ddi_copyout(&prg, arg, sizeof (pcitool_reg_t), mode) !=