Cross Reference: /illumos-gate/usr/src/uts/i86pc/io/dr/dr.c

Lines Matching defs:devset
1050 	dr_devset_t	devset;
1056 	devset = shp->h_devset;
1060 	devset = DEVSET_AND(devset, DR_DEVS_PRESENT(bp));
1061 	hp->h_err = drmach_pre_op(cmd, bp->b_id, &hp->h_opts, &devset);
1078 		state_err = dr_check_transition(bp, &devset, transp, cmd);
1086 			PR_ALL("%s: invalid devset (0x%x)\n",
1087 			    f, (uint_t)devset);
1101 			shp->h_devset = devset;
1373 	dr_devset_t	devset;
1383 	devset = hp->h_devset & DR_DEVS_PRESENT(bp) &
1386 	if ((devset == 0) && DR_DEVS_PRESENT(bp)) {
1413 	DR_DEVS_DISCONNECT(bp, devset);
1415 	ASSERT((DR_DEVS_ATTACHED(bp) & devset) == 0);
1423 		if (!DEVSET_IN_SET(devset, SBD_COMP_CPU, i))
1438 		if (!DEVSET_IN_SET(devset, SBD_COMP_MEM, i))
1453 		if (!DEVSET_IN_SET(devset, SBD_COMP_IO, i))
2032 	dr_devset_t	devset;
2042 	devset = hp->h_devset & DR_DEVS_RELEASED(bp);
2052 		if (!DEVSET_IN_SET(devset, SBD_COMP_CPU, i))
2067 		if (!DEVSET_IN_SET(devset, SBD_COMP_IO, i))
2076 		if (!DEVSET_IN_SET(devset, SBD_COMP_MEM, i))
2088 	PR_ALL("%s: unreleasing devset (0x%x)\n", f, (uint_t)devset);
2090 	DR_DEVS_CANCEL(bp, devset);
2116 	dr_devset_t	devset = 0;
2133 	devset = shp->h_devset;
2175 			devset = 0;
2253 	devset &= DR_DEVS_PRESENT(bp);
2254 	if (devset == 0) {
2261 	if (DEVSET_IN_SET(devset, SBD_COMP_CPU, DEVSET_ANYUNIT))
2262 		if ((nstat = dr_cpu_status(hp, devset, devstatp)) > 0) {
2267 	if (DEVSET_IN_SET(devset, SBD_COMP_MEM, DEVSET_ANYUNIT))
2268 		if ((nstat = dr_mem_status(hp, devset, devstatp)) > 0) {
2273 	if (DEVSET_IN_SET(devset, SBD_COMP_IO, DEVSET_ANYUNIT))
2274 		if ((nstat = dr_io_status(hp, devset, devstatp)) > 0) {
2439 	dr_devset_t	devset;
2441 	devset = DR_DEVS_PRESENT(hp->h_bd);
2443 		devset &= DEVSET(hp->h_sbdcmd.cmd_cm.c_id.c_type,
2450 	 * cores for that CMP present in the devset.
2453 		if (devset & DEVSET(SBD_COMP_CMP, i)) {
2458 	/* eliminate the CPU information from the devset */
2459 	devset &= ~(DEVSET(SBD_COMP_CMP, DEVSET_ANYUNIT));
2462 		ncm += devset & 0x1;
2463 		devset >>= 1;
2544 	dr_devset_t	devset;
2549 			devset =  DEVSET(SBD_COMP_CPU, DEVSET_ANYUNIT);
2550 			devset |= DEVSET(SBD_COMP_MEM, DEVSET_ANYUNIT);
2551 			devset |= DEVSET(SBD_COMP_IO,  DEVSET_ANYUNIT);
2552 			PR_ALL("%s: COMP_NONE devset = " DEVSET_FMT_STR "\n",
2553 			    f, DEVSET_FMT_ARG(devset));
2561 				devset = 0;
2564 				 * Generate a devset that includes all the
2571 				devset = DEVSET(SBD_COMP_CMP, unit);
2574 			PR_ALL("%s: CPU devset = " DEVSET_FMT_STR "\n",
2575 			    f, DEVSET_FMT_ARG(devset));
2588 				devset = 0;
2590 				devset = DEVSET(cid->c_type, unit);
2592 			PR_ALL("%s: MEM devset = " DEVSET_FMT_STR "\n",
2593 			    f, DEVSET_FMT_ARG(devset));
2601 				devset = 0;
2603 				devset = DEVSET(cid->c_type, unit);
2605 			PR_ALL("%s: IO devset = " DEVSET_FMT_STR "\n",
2606 			    f, DEVSET_FMT_ARG(devset));
2611 			devset = 0;
2615 	return (devset);
2663 	dr_devset_t		devset;
2667 	devset = *devsetp;
2669 	if (DEVSET_IN_SET(devset, SBD_COMP_CPU, DEVSET_ANYUNIT)) {
2671 			if (DEVSET_IN_SET(devset, SBD_COMP_CPU, ut) == 0)
2677 				DEVSET_DEL(devset, SBD_COMP_CPU, ut);
2682 					DEVSET_DEL(devset, SBD_COMP_CPU, ut);
2687 	if (DEVSET_IN_SET(devset, SBD_COMP_MEM, DEVSET_ANYUNIT)) {
2689 			if (DEVSET_IN_SET(devset, SBD_COMP_MEM, ut) == 0)
2695 				DEVSET_DEL(devset, SBD_COMP_MEM, ut);
2700 					DEVSET_DEL(devset, SBD_COMP_MEM, ut);
2705 	if (DEVSET_IN_SET(devset, SBD_COMP_IO, DEVSET_ANYUNIT)) {
2707 			if (DEVSET_IN_SET(devset, SBD_COMP_IO, ut) == 0)
2713 				DEVSET_DEL(devset, SBD_COMP_IO, ut);
2718 					DEVSET_DEL(devset, SBD_COMP_IO, ut);
2724 	PR_ALL("%s: requested devset = 0x%x, final devset = 0x%x\n",
2725 	    f, (uint_t)*devsetp, (uint_t)devset);
2727 	*devsetp = devset;
2738 	return (devset ? 0 : state_err);