Cross Reference: /illumos-gate/usr/src/uts/i86pc/io/apix/apix

Lines Matching refs:cpu
99 	struct cpu *cpu = CPU;
107 	if (avp->av_vector != NULL && avp->av_prilevel < cpu->cpu_base_spl) {
227 apix_do_softint_prolog(struct cpu *cpu, uint_t pil, uint_t oldpil,
231 	struct machcpu *mcpu = &cpu->cpu_m;
235 	ASSERT(pil > mcpu->mcpu_pri && pil > cpu->cpu_base_spl);
248 	it = cpu->cpu_intr_thread;
250 	cpu->cpu_intr_thread = it->t_link;
253 	t = cpu->cpu_thread;
257 		cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
281 	cpu->cpu_thread = it;
286 	ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0);
287 	cpu->cpu_intr_actv |= (1 << pil);
300 apix_do_softint_epilog(struct cpu *cpu, uint_t oldpil)
302 	struct machcpu *mcpu = &cpu->cpu_m;
308 	it = cpu->cpu_thread;
311 	cpu->cpu_stats.sys.intr[pil - 1]++;
313 	ASSERT(cpu->cpu_intr_actv & (1 << pil));
314 	cpu->cpu_intr_actv &= ~(1 << pil);
318 	cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
331 		/* mcpu->mcpu_pri = cpu->cpu_base_spl; */
334 		it->t_link = cpu->cpu_intr_thread;
335 		cpu->cpu_intr_thread = it;
342 	it->t_link = cpu->cpu_intr_thread;
343 	cpu->cpu_intr_thread = it;
345 	cpu->cpu_thread = t;
348 	basespl = cpu->cpu_base_spl;
359 	struct cpu *cpu = CPU;
364 	av_dispatch_softvect((int)cpu->cpu_thread->t_pil);
371 	apix_do_softint_epilog(cpu, oldpil);
381 	struct cpu *cpu = CPU;
387 	while ((pending = cpu->cpu_softinfo.st_pending) != 0) {
389 		oldipl = cpu->cpu_pri;
390 		if (newipl <= oldipl || newipl <= cpu->cpu_base_spl)
393 		newsp = apix_do_softint_prolog(cpu, newipl, oldipl,
403 apix_hilevel_intr_prolog(struct cpu *cpu, uint_t pil, uint_t oldpil,
406 	struct machcpu *mcpu = &cpu->cpu_m;
409 	apix_impl_t *apixp = apixs[cpu->cpu_id];
412 	ASSERT(pil > mcpu->mcpu_pri && pil > cpu->cpu_base_spl);
415 		cpu->cpu_profile_pil = oldpil;
417 			cpu->cpu_profile_pc = 0;
418 			cpu->cpu_profile_upc = rp->r_pc;
419 			cpu->cpu_cpcprofile_pc = 0;
420 			cpu->cpu_cpcprofile_upc = rp->r_pc;
422 			cpu->cpu_profile_pc = rp->r_pc;
423 			cpu->cpu_profile_upc = 0;
424 			cpu->cpu_cpcprofile_pc = rp->r_pc;
425 			cpu->cpu_cpcprofile_upc = 0;
431 	mask = cpu->cpu_intr_actv & CPU_INTR_ACTV_HIGH_LEVEL_MASK;
444 		cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
446 		kthread_t *t = cpu->cpu_thread;
456 			cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
471 		uint16_t *refcntp = (uint16_t *)&cpu->cpu_intr_actv + 1;
475 	cpu->cpu_intr_actv |= (1 << pil);
483 apix_hilevel_intr_epilog(struct cpu *cpu, uint_t oldpil)
485 	struct machcpu *mcpu = &cpu->cpu_m;
491 	cpu->cpu_stats.sys.intr[pil - 1]++;
493 	ASSERT(cpu->cpu_intr_actv & (1 << pil));
502 		uint16_t *refcntp = (uint16_t *)&cpu->cpu_intr_actv + 1;
507 			cpu->cpu_intr_actv &= ~(1 << pil);
509 		cpu->cpu_intr_actv &= ~(1 << pil);
516 	cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
523 	mask = cpu->cpu_intr_actv & CPU_INTR_ACTV_HIGH_LEVEL_MASK;
545 		kthread_t *t = cpu->cpu_thread;
570 apix_do_pending_hilevel(struct cpu *cpu, struct regs *rp)
576 	while ((pending = HILEVEL_PENDING(cpu)) != 0) {
578 		ASSERT(newipl > LOCK_LEVEL && newipl > cpu->cpu_base_spl);
579 		oldipl = cpu->cpu_pri;
584 		 * High priority interrupts run on this cpu's interrupt stack.
586 		if (apix_hilevel_intr_prolog(cpu, newipl, oldipl, rp) == 0) {
587 			newsp = cpu->cpu_intr_stack;
593 		(void) apix_hilevel_intr_epilog(cpu, oldipl);
605 apix_intr_thread_prolog(struct cpu *cpu, uint_t pil, caddr_t stackptr)
607 	apix_impl_t *apixp = apixs[cpu->cpu_id];
608 	struct machcpu *mcpu = &cpu->cpu_m;
612 	ASSERT(pil > mcpu->mcpu_pri && pil > cpu->cpu_base_spl);
615 	ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0);
616 	cpu->cpu_intr_actv |= (1 << pil);
625 	t = cpu->cpu_thread;
629 		cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
650 	it = cpu->cpu_intr_thread;
651 	cpu->cpu_intr_thread = it->t_link;
662 	cpu->cpu_thread = it;
675 apix_intr_thread_epilog(struct cpu *cpu, uint_t oldpil)
677 	struct machcpu *mcpu = &cpu->cpu_m;
678 	kthread_t *t, *it = cpu->cpu_thread;
684 	cpu->cpu_stats.sys.intr[pil - 1]++;
686 	ASSERT(cpu->cpu_intr_actv & (1 << pil));
687 	cpu->cpu_intr_actv &= ~(1 << pil);
692 	cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
712 		cpu->cpu_stats.sys.intrblk++;
719 		basespl = cpu->cpu_base_spl;
727 		it->t_link = cpu->cpu_intr_thread;
728 		cpu->cpu_intr_thread = it;
740 	it->t_link = cpu->cpu_intr_thread;
741 	cpu->cpu_intr_thread = it;
744 	cpu->cpu_thread = t;
747 	basespl = cpu->cpu_base_spl;
756 	struct cpu *cpu = CPU;
760 	apix_dispatch_pending_autovect((int)cpu->cpu_thread->t_pil);
766 	apix_intr_thread_epilog(cpu, oldpil);
770 apix_do_pending_hardint(struct cpu *cpu, struct regs *rp)
776 	while ((pending = LOWLEVEL_PENDING(cpu)) != 0) {
779 		oldipl = cpu->cpu_pri;
780 		if (newipl <= oldipl || newipl <= cpu->cpu_base_spl)
786 		newsp = apix_intr_thread_prolog(cpu, newipl, (caddr_t)rp);
812 	struct cpu *cpu = CPU;
813 	apix_vector_t *vecp = xv_vector(cpu->cpu_id, vector);
854 	struct cpu *cpu = CPU;
862 	apix_intr_thread_epilog(cpu, oldipl);
871 	struct cpu *cpu = CPU;
872 	int vector = rp->r_trapno, newipl, oldipl = cpu->cpu_pri, ret;
877 	ttp->ttr_cpuid = cpu->cpu_id;
880 	ttp->ttr_spl = cpu->cpu_base_spl;
886 	++*(uint16_t *)&cpu->cpu_m.mcpu_istamp;
899 		(void) apix_do_pending_hilevel(cpu, rp);
900 		(void) apix_do_pending_hardint(cpu, rp);
924 	vecp = xv_vector(cpu->cpu_id, vector);
933 	    newipl > MAX(oldipl, cpu->cpu_base_spl)) {
937 			if (apix_hilevel_intr_prolog(cpu, newipl, oldipl, rp)
939 				newsp = cpu->cpu_intr_stack;
945 			(void) apix_hilevel_intr_epilog(cpu, oldipl);
947 			newsp = apix_intr_thread_prolog(cpu, newipl,
955 		if (newipl <= MAX(oldipl, cpu->cpu_base_spl) ||
956 		    !apixs[cpu->cpu_id]->x_intr_pending)
960 	if (apix_do_pending_hilevel(cpu, rp) < 0)
964 		ret = apix_do_pending_hardint(cpu, rp);
970 	} while (!ret && LOWLEVEL_PENDING(cpu));