Lines Matching defs:entry
73 cmn_err(CE_WARN, "No IVHD entry for 0x%x", bdf);
331 uint64_t entry[4] = {0};
353 /* New devtbl entry for this domain. Bump up the domain ref-count */
356 entry[3] = 0;
357 entry[2] = 0;
358 AMD_IOMMU_REG_SET64(&(entry[1]), AMD_IOMMU_DEVTBL_EX, 1);
359 AMD_IOMMU_REG_SET64(&(entry[1]), AMD_IOMMU_DEVTBL_SD, 0);
360 AMD_IOMMU_REG_SET64(&(entry[1]), AMD_IOMMU_DEVTBL_CACHE, 0);
361 AMD_IOMMU_REG_SET64(&(entry[1]), AMD_IOMMU_DEVTBL_IOCTL, 1);
362 AMD_IOMMU_REG_SET64(&(entry[1]), AMD_IOMMU_DEVTBL_SA, 0);
363 AMD_IOMMU_REG_SET64(&(entry[1]), AMD_IOMMU_DEVTBL_SE, 1);
364 AMD_IOMMU_REG_SET64(&(entry[1]), AMD_IOMMU_DEVTBL_DOMAINID,
366 AMD_IOMMU_REG_SET64(&(entry[0]), AMD_IOMMU_DEVTBL_IW, 1);
367 AMD_IOMMU_REG_SET64(&(entry[0]), AMD_IOMMU_DEVTBL_IR, 1);
368 AMD_IOMMU_REG_SET64(&(entry[0]), AMD_IOMMU_DEVTBL_ROOT_PGTBL,
370 AMD_IOMMU_REG_SET64(&(entry[0]), AMD_IOMMU_DEVTBL_PG_MODE,
372 AMD_IOMMU_REG_SET64(&(entry[0]), AMD_IOMMU_DEVTBL_TV,
374 AMD_IOMMU_REG_SET64(&(entry[0]), AMD_IOMMU_DEVTBL_V,
378 devtbl_entry[i] = entry[i];
380 devtbl_entry[0] = entry[0];
492 cmn_err(CE_NOTE, "%s: attempting to set devtbl entry for %s",
511 cmn_err(CE_NOTE, "%s: deviceid=%u devtbl entry (%p) for %s",
543 /* Initialize device table entry */
566 cmn_err(CE_NOTE, "%s: attempting to clear devtbl entry for "
586 cmn_err(CE_NOTE, "%s: deviceid=%u devtbl entry (%p) for %s",
1234 /* No need for pagetables. Just set up device table entry */
1273 "Failed to set device table entry for path %s.",
1316 * Just the device table entry