Cross Reference: /illumos-gate/usr/src/uts/i86pc/io/amd_iommu/amd_iommu

Lines Matching defs:cmdptr
47     amd_iommu_cmd_flags_t flags, uint32_t *cmdptr)
62 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_S, 0);
63 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_I, 1);
64 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_F,
66 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_STORE_ADDR_LO,
68 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x01);
69 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_COMPL_WAIT_STORE_ADDR_HI,
71 	cmdptr[2] = 0;
72 	cmdptr[3] = 0;
79     amd_iommu_cmd_flags_t flags, uint32_t *cmdptr)
97 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_DEVTAB_DEVICEID,
99 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x02);
100 	cmdptr[2] = 0;
101 	cmdptr[3] = 0;
109     amd_iommu_cmd_flags_t flags, uint32_t *cmdptr)
121 	cmdptr[0] = 0;
122 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_INVAL_PAGES_DOMAINID,
124 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x03);
125 	AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_PAGES_PDE,
127 	AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_PAGES_S,
129 	AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_PAGES_ADDR_LO,
131 	cmdptr[3] = addr_hi;
140     amd_iommu_cmd_flags_t flags, uint32_t *cmdptr)
153 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_IOTLB_DEVICEID,
155 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_IOTLB_MAXPEND,
157 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x04);
158 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_INVAL_IOTLB_QUEUEID,
160 	AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_IOTLB_ADDR_LO,
162 	AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_IOTLB_S,
164 	cmdptr[3] = addr_hi;
171     amd_iommu_cmd_flags_t flags, uint32_t *cmdptr)
186 	AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_INTR_DEVICEID,
188 	AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x05);
189 	cmdptr[2] = 0;
190 	cmdptr[3] = 0;
201 	uint32_t cmdptr[4] = {0};
226 		error = create_compl_wait_cmd(iommu, cmdargs, flags, cmdptr);
230 		    flags & ~AMD_IOMMU_CMD_FLAGS_COMPL_WAIT, cmdptr);
234 		    flags & ~AMD_IOMMU_CMD_FLAGS_COMPL_WAIT, cmdptr);
238 		    flags & ~AMD_IOMMU_CMD_FLAGS_COMPL_WAIT, cmdptr);
242 		    flags & ~AMD_IOMMU_CMD_FLAGS_COMPL_WAIT, cmdptr);
262 		iommu->aiomt_cmd_tail[i] = cmdptr[i];