Cross Reference: /illumos-gate/usr/src/uts/common/os/sunpci.c

Lines Matching refs:confhdl
267 static uint32_t pci_save_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf,
269 static void pci_restore_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf,
271 static uint32_t pci_generic_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
273 static uint32_t pci_msi_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
275 static uint32_t pci_pcix_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
277 static uint32_t pci_pcie_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
279 static uint32_t pci_ht_addrmap_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
281 static uint32_t pci_ht_funcext_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
283 static void pci_fill_buf(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
285 static uint32_t cap_walk_and_save(ddi_acc_handle_t confhdl, uint32_t *regbuf,
287 static void pci_pmcap_check(ddi_acc_handle_t confhdl, uint32_t *regbuf,
371 	ddi_acc_handle_t confhdl;
394 	if (pci_config_setup(dip, &confhdl) != DDI_SUCCESS) {
406 	if (ddi_regs_map_setup(dip, 0, &cfgaddr, 0, 0, &attr, &confhdl)
418 	status = pci_config_get16(confhdl, PCI_CONF_STAT);
427 	cap_ptr = pci_config_get8(confhdl, PCI_BCNF_CAP_PTR);
432 		cap_id = pci_config_get8(confhdl,
438 		cap_ptr = pci_config_get8(confhdl,
455 		hp = impl_acc_hdl_get(confhdl);
467 			*p = pci_config_get32(confhdl, offset);
502 		chsp->chs_command = pci_config_get16(confhdl, PCI_CONF_COMM);
503 		chsp->chs_header_type =	pci_config_get8(confhdl,
508 			    pci_config_get16(confhdl, PCI_BCNF_BCNTRL);
509 		chsp->chs_cache_line_size = pci_config_get8(confhdl,
511 		chsp->chs_latency_timer = pci_config_get8(confhdl,
516 			    pci_config_get8(confhdl, PCI_BCNF_LATENCY_TIMER);
519 		chsp->chs_base0 = pci_config_get32(confhdl, PCI_CONF_BASE0);
520 		chsp->chs_base1 = pci_config_get32(confhdl, PCI_CONF_BASE1);
521 		chsp->chs_base2 = pci_config_get32(confhdl, PCI_CONF_BASE2);
522 		chsp->chs_base3 = pci_config_get32(confhdl, PCI_CONF_BASE3);
523 		chsp->chs_base4 = pci_config_get32(confhdl, PCI_CONF_BASE4);
524 		chsp->chs_base5 = pci_config_get32(confhdl, PCI_CONF_BASE5);
537 		nwords = pci_save_caps(confhdl, p, pci_cap_descp, &ncaps);
558 	pci_config_teardown(&confhdl);
572 pci_save_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf,
575 	return (cap_walk_and_save(confhdl, regbuf, cap_descp, ncapsp, 0));
579 cap_walk_and_save(ddi_acc_handle_t confhdl, uint32_t *regbuf,
593 	status = pci_config_get16(confhdl, PCI_CONF_STAT);
599 		cap_ptr = pci_config_get8(confhdl, PCI_BCNF_CAP_PTR);
604 		cap_id = CAP_ID(confhdl, cap_ptr, xspace);
609 			cap_reg = pci_config_get16(confhdl,
623 		cap_ptr = NEXT_CAP(confhdl, cap_ptr, xspace);
631 			if ((nwords = pci_cap_entp->cap_save_func(confhdl,
648 pci_fill_buf(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
654 		*regbuf = pci_config_get32(confhdl, cap_ptr);
661 pci_generic_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf,
664 	pci_fill_buf(confhdl, cap_ptr, regbuf, nwords);
670 pci_msi_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf,
677 	msi_ctrl = pci_config_get16(confhdl, cap_ptr + PCI_MSI_CTRL);
684 	pci_fill_buf(confhdl, cap_ptr, regbuf, nwords);
691 pci_pcix_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf,
698 	pcix_command = pci_config_get16(confhdl, cap_ptr + PCI_PCIX_COMMAND);
703 	pci_fill_buf(confhdl, cap_ptr, regbuf, nwords);
710 pci_pcie_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf,
718 pci_ht_addrmap_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
724 	reg = pci_config_get16(confhdl, cap_ptr + PCI_CAP_ID_REGS_OFF);
740 	pci_fill_buf(confhdl, cap_ptr, regbuf, nwords);
746 pci_ht_funcext_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
752 	reg = pci_config_get16(confhdl, cap_ptr + PCI_CAP_ID_REGS_OFF);
757 	pci_fill_buf(confhdl, cap_ptr, regbuf, nwords);
762 pci_pmcap_check(ddi_acc_handle_t confhdl, uint32_t *regbuf,
774 	pmcsr = pci_config_get16(confhdl, pmcsr_offset);
780 pci_restore_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf,
789 			pci_pmcap_check(confhdl, regbuf, offset);
791 			pci_config_put32(confhdl, offset, *regbuf);
805 	ddi_acc_handle_t confhdl;
813 	if (pci_config_setup(dip, &confhdl) != DDI_SUCCESS) {
835 				pci_config_put32(confhdl, offset, *p);
852 			pci_config_teardown(&confhdl);
857 		pci_config_put16(confhdl, PCI_CONF_COMM,
861 			pci_config_put16(confhdl, PCI_BCNF_BCNTRL,
864 		pci_config_put8(confhdl, PCI_CONF_CACHE_LINESZ,
866 		pci_config_put8(confhdl, PCI_CONF_LATENCY_TIMER,
870 			pci_config_put8(confhdl, PCI_BCNF_LATENCY_TIMER,
873 		pci_config_put32(confhdl, PCI_CONF_BASE0, chs_p->chs_base0);
874 		pci_config_put32(confhdl, PCI_CONF_BASE1, chs_p->chs_base1);
875 		pci_config_put32(confhdl, PCI_CONF_BASE2, chs_p->chs_base2);
876 		pci_config_put32(confhdl, PCI_CONF_BASE3, chs_p->chs_base3);
877 		pci_config_put32(confhdl, PCI_CONF_BASE4, chs_p->chs_base4);
878 		pci_config_put32(confhdl, PCI_CONF_BASE5, chs_p->chs_base5);
890 			pci_restore_caps(confhdl, p, cap_descp, elements);
900 	(void) pci_config_get32(confhdl, PCI_CONF_BASE5);
910 	pci_config_teardown(&confhdl);
922 	pci_config_teardown(&confhdl);