Lines Matching refs:link

716 	 * Initialize default link configuration parameters.
1268 * Get new link state and inform the mac layer.
1316 (link_state_t)vrp->chip.link.state);
1460 if (n > 0 && vrp->chip.link.flowctrl == VR_PAUSE_BIDIRECTIONAL) {
1691 vrp->chip.link.state == VR_LINK_STATE_UP && vrp->reset == 0) {
1731 * MAC looses sync with PHY. Result link up, no link change interrupt
1900 * Configure the link. Rely on the link change interrupt for getting
1901 * the link state into the driver.
2432 v = vrp->chip.link.duplex;
2436 v = vrp->chip.link.flowctrl;
2548 v = vrp->chip.link.mau;
2572 if (vrp->chip.link.speed == VR_LINK_SPEED_100MBS)
2574 else if (vrp->chip.link.speed == VR_LINK_SPEED_10MBS)
2659 * Configure the ethernet link according to param and chip.mii.
2678 * to configure the link. However, dladm doesn't allow changes
2712 (link_state_t)vrp->chip.link.state);
2717 * Get link state in the driver and configure the MAC accordingly.
2733 * If we did autongeg, deduce the link type/speed by selecting the
2739 vrp->chip.link.speed = VR_LINK_SPEED_100MBS;
2740 vrp->chip.link.duplex = VR_LINK_DUPLEX_FULL;
2741 vrp->chip.link.mau = VR_MAU_100X;
2743 vrp->chip.link.speed = VR_LINK_SPEED_100MBS;
2744 vrp->chip.link.duplex = VR_LINK_DUPLEX_HALF;
2745 vrp->chip.link.mau = VR_MAU_100T4;
2747 vrp->chip.link.speed = VR_LINK_SPEED_100MBS;
2748 vrp->chip.link.duplex = VR_LINK_DUPLEX_HALF;
2749 vrp->chip.link.mau = VR_MAU_100X;
2751 vrp->chip.link.speed = VR_LINK_SPEED_10MBS;
2752 vrp->chip.link.duplex = VR_LINK_DUPLEX_FULL;
2753 vrp->chip.link.mau = VR_MAU_10;
2755 vrp->chip.link.speed = VR_LINK_SPEED_10MBS;
2756 vrp->chip.link.duplex = VR_LINK_DUPLEX_HALF;
2757 vrp->chip.link.mau = VR_MAU_10;
2759 vrp->chip.link.speed = VR_LINK_SPEED_UNKNOWN;
2760 vrp->chip.link.duplex = VR_LINK_DUPLEX_UNKNOWN;
2761 vrp->chip.link.mau = VR_MAU_UNKNOWN;
2768 vrp->chip.link.duplex == VR_LINK_DUPLEX_FULL)
2769 vrp->chip.link.flowctrl = VR_PAUSE_BIDIRECTIONAL;
2771 vrp->chip.link.flowctrl = VR_PAUSE_NONE;
2785 * The link type is defined by the control register.
2788 vrp->chip.link.speed = VR_LINK_SPEED_100MBS;
2789 vrp->chip.link.mau = VR_MAU_100X;
2791 vrp->chip.link.speed = VR_LINK_SPEED_10MBS;
2792 vrp->chip.link.mau = VR_MAU_10;
2796 vrp->chip.link.duplex = VR_LINK_DUPLEX_FULL;
2798 vrp->chip.link.duplex = VR_LINK_DUPLEX_HALF;
2802 vrp->chip.link.flowctrl = VR_PAUSE_NONE;
2809 if (vrp->chip.link.duplex == VR_LINK_DUPLEX_FULL) {
2828 if (vrp->chip.link.flowctrl == VR_PAUSE_BIDIRECTIONAL) {
2889 * Set link state.
2892 vrp->chip.link.state = VR_LINK_STATE_UP;
2894 vrp->chip.link.state = VR_LINK_STATE_DOWN;
2901 * This polling process is required for the functionality of the link change
3221 val = vrp->chip.link.duplex;
3254 val = vrp->chip.link.flowctrl;
3262 if (vrp->chip.link.speed ==
3265 else if (vrp->chip.link.speed ==
3273 val = vrp->chip.link.state;
3529 vrp->chip.link.speed =
3532 vrp->chip.link.speed =