Lines Matching defs:qh
62 * Initialize the values which the order of 32ms intr qh are executed
274 ehci_qh_t *qh);
313 * Some Nvidia chips can not handle qh dma address above 2G.
4356 ehci_qh_t *qh)
4361 "ehci_print_qh: qh = 0x%p", (void *)qh);
4364 "\tqh_link_ptr: 0x%x ", Get_QH(qh->qh_link_ptr));
4366 "\tqh_ctrl: 0x%x ", Get_QH(qh->qh_ctrl));
4368 "\tqh_split_ctrl: 0x%x ", Get_QH(qh->qh_split_ctrl));
4370 "\tqh_curr_qtd: 0x%x ", Get_QH(qh->qh_curr_qtd));
4372 "\tqh_next_qtd: 0x%x ", Get_QH(qh->qh_next_qtd));
4374 "\tqh_alt_next_qtd: 0x%x ", Get_QH(qh->qh_alt_next_qtd));
4376 "\tqh_status: 0x%x ", Get_QH(qh->qh_status));
4380 "\tqh_buf[%d]: 0x%x ", i, Get_QH(qh->qh_buf[i]));
4386 i, Get_QH(qh->qh_buf_high[i]));
4390 "\tqh_dummy_qtd: 0x%x ", Get_QH(qh->qh_dummy_qtd));
4392 "\tqh_prev: 0x%x ", Get_QH(qh->qh_prev));
4394 "\tqh_state: 0x%x ", Get_QH(qh->qh_state));
4396 "\tqh_reclaim_next: 0x%x ", Get_QH(qh->qh_reclaim_next));
4398 "\tqh_reclaim_frame: 0x%x ", Get_QH(qh->qh_reclaim_frame));