Lines Matching refs:gc
109 &(dp)->tx_buf[SLOT((dp)->tx_slots_base + (sn), (dp)->gc.gc_tx_buf_size)]
367 int rx_desc_unit_shift = dp->gc.gc_rx_desc_unit_shift;
375 n = dp->gc.gc_rx_ring_size - head;
395 int tx_desc_unit_shift = dp->gc.gc_tx_desc_unit_shift;
403 n = dp->gc.gc_tx_ring_size - head;
423 SLOT(head, dp->gc.gc_rx_ring_size), nslot,
443 SLOT(dp->tx_active_head, dp->gc.gc_tx_buf_size),
445 SLOT(dp->tx_active_tail, dp->gc.gc_tx_buf_size),
448 SLOT(dp->tx_softq_head, dp->gc.gc_tx_buf_size),
450 SLOT(dp->tx_softq_tail, dp->gc.gc_tx_buf_size),
453 SLOT(dp->tx_free_head, dp->gc.gc_tx_buf_size),
455 SLOT(dp->tx_free_tail, dp->gc.gc_tx_buf_size),
458 SLOT(dp->tx_desc_head, dp->gc.gc_tx_ring_size),
460 SLOT(dp->tx_desc_tail, dp->gc.gc_tx_ring_size),
463 SLOT(dp->tx_desc_intr, dp->gc.gc_tx_ring_size),
526 &dp->gc.gc_dma_attr_rxbuf,
541 &dp->gc.gc_buf_attr,
546 (dp->gc.gc_rx_header_len > 0)
565 ((dp->gc.gc_rx_header_len > 0)
625 req_size = dp->rx_desc_size + dp->tx_desc_size + dp->gc.gc_io_area_size;
632 &dp->gc.gc_dma_attr_desc,
642 req_size, &dp->gc.gc_desc_attr,
685 ASSERT(dp->gc.gc_tx_buf_size > 0);
688 dma_attr_txbounce = dp->gc.gc_dma_attr_txbuf;
700 i < dp->gc.gc_tx_buf_size; i++, tbp++) {
717 &dp->gc.gc_buf_attr,
750 if (dp->gc.gc_tx_buf_size > 0) {
786 for (i = dp->gc.gc_tx_buf_size, tbp = dp->tx_buf; i--; tbp++) {
832 int rx_ring_size = dp->gc.gc_rx_ring_size;
836 rx_ring_size, dp->gc.gc_rx_buf_max));
840 (*dp->gc.gc_rx_desc_init)(dp, i);
865 nrbuf = min(dp->gc.gc_rx_ring_size, dp->gc.gc_rx_buf_max);
874 0, dp->gc.gc_rx_ring_size, DDI_DMA_SYNC_FORDEV);
885 int rx_ring_size = dp->gc.gc_rx_ring_size;
897 (*dp->gc.gc_rx_desc_clean)(dp, i);
931 int tx_buf_size = dp->gc.gc_tx_buf_size;
932 int tx_ring_size = dp->gc.gc_tx_ring_size;
936 dp->gc.gc_tx_ring_size, dp->gc.gc_tx_buf_size));
950 dp->tx_free_tail = dp->gc.gc_tx_buf_limit;
957 (*dp->gc.gc_tx_desc_init)(dp, i);
986 int tx_ring_size = dp->gc.gc_tx_ring_size;
999 (*dp->gc.gc_tx_desc_clean)(dp, i);
1019 while (sn != head + dp->gc.gc_tx_buf_size) {
1024 sn, SLOT(sn, dp->gc.gc_tx_buf_size),
1039 ASSERT(dp->tx_free_tail == dp->tx_free_head + dp->gc.gc_tx_buf_limit);
1061 int tx_ring_size = dp->gc.gc_tx_ring_size;
1063 int slot, int ndesc) = dp->gc.gc_tx_desc_stat;
1082 head, SLOT(head, dp->gc.gc_tx_buf_size),
1083 tail, SLOT(tail, dp->gc.gc_tx_buf_size));
1090 == dp->gc.gc_tx_buf_limit);
1162 head, SLOT(head, dp->gc.gc_tx_buf_size),
1163 tail, SLOT(tail, dp->gc.gc_tx_buf_size));
1178 while (sn != dp->tx_active_head + dp->gc.gc_tx_buf_limit) {
1187 ASSERT(dp->tx_active_head + dp->gc.gc_tx_buf_limit == sn);
1190 dp->tx_active_head + dp->gc.gc_tx_buf_limit;
1219 int tx_ring_size = dp->gc.gc_tx_ring_size;
1223 int frags, uint64_t flag) = dp->gc.gc_tx_desc_write;
1285 (min_pkt > ETHERMIN || !dp->gc.gc_tx_auto_pad)) {
1313 if (dp->gc.gc_tx_max_frags >= 3 &&
1362 dp->gc.gc_tx_start(dp,
1363 SLOT(tbp_head->txb_desc, dp->gc.gc_tx_ring_size),
1599 (void) (*dp->gc.gc_set_rx_filter)(dp);
1605 if ((*dp->gc.gc_reset_chip)(dp) != GEM_SUCCESS) {
1617 if ((dp->gc.gc_set_media)(dp) != GEM_SUCCESS) {
1624 if ((*dp->gc.gc_set_rx_filter)(dp) != GEM_SUCCESS) {
1680 now - dp->tx_blocked > dp->gc.gc_tx_timeout_interval) {
1691 if (now - tbp->txb_stime < dp->gc.gc_tx_timeout) {
1718 (void *)dp, dp->gc.gc_tx_timeout_interval);
1732 int rx_ring_size = dp->gc.gc_rx_ring_size;
1755 dp->gc.gc_rx_desc_write(dp,
1768 int rx_header_len = dp->gc.gc_rx_header_len;
1810 int rx_ring_size = dp->gc.gc_rx_ring_size;
1816 int rx_header_len = dp->gc.gc_rx_header_len;
1823 rx_desc_stat = dp->gc.gc_rx_desc_stat;
1868 if ((mp = dp->gc.gc_get_packet(dp, rbp, len)) == NULL) {
1955 dp->gc.gc_rx_start(dp,
2005 min(dp->tx_max_packets + 2, dp->gc.gc_tx_buf_limit);
2028 ret = (*dp->gc.gc_interrupt)(dp);
2092 (*dp->gc.gc_mii_sync)(dp);
2094 return ((*dp->gc.gc_mii_read)(dp, reg));
2101 (*dp->gc.gc_mii_sync)(dp);
2103 (*dp->gc.gc_mii_write)(dp, reg, val);
2169 dp->name, __func__, val, MII_ABILITY_BITS, dp->gc.gc_mii_mode,
2277 (*dp->gc.gc_mii_sync)(dp);
2292 (*dp->gc.gc_mii_sync)(dp);
2308 if ((*dp->gc.gc_mii_config)(dp) != GEM_SUCCESS) {
2340 (dp->gc.gc_mii_an_timeout
2341 - dp->gc.gc_mii_an_wait) > 0) {
2385 dp->mii_interval = dp->gc.gc_mii_an_watch_interval;
2399 if (dp->gc.gc_mii_an_delay > 0) {
2400 dp->mii_timer = dp->gc.gc_mii_an_delay;
2428 if (dp->gc.gc_mii_an_delay > 0) {
2576 dp->mii_timer = dp->gc.gc_mii_linkdown_timeout;
2584 dp->gc.gc_mii_an_oneshot || fix_phy) {
2624 (*dp->gc.gc_set_media)(dp);
2627 if ((void *)dp->gc.gc_mii_tune_phy) {
2630 (*dp->gc.gc_mii_tune_phy)(dp);
2659 dp->mii_interval = dp->gc.gc_mii_link_watch_interval;
2662 if (dp->gc.gc_mii_hw_link_detection &&
2685 dp->gc.gc_mii_linkdown_timeout_action;
2704 dp->gc.gc_mii_stop_mac_on_linkdown) {
2715 linkdown_action = dp->gc.gc_mii_linkdown_action;
2720 dp->mii_timer = dp->gc.gc_mii_linkdown_timeout;
2722 if ((void *)dp->gc.gc_mii_tune_phy) {
2724 (*dp->gc.gc_mii_tune_phy)(dp);
2726 dp->mii_interval = dp->gc.gc_mii_link_watch_interval;
2731 if (dp->gc.gc_mii_hw_link_detection &&
2738 dp->mii_interval = dp->gc.gc_mii_link_watch_interval;
2754 if (dp->gc.gc_mii_an_oneshot) {
2759 dp->mii_timer = dp->gc.gc_mii_an_timeout;
2760 dp->mii_interval = dp->gc.gc_mii_an_watch_interval;
2773 dp->name, dp->gc.gc_mii_linkdown_action);
2783 dp->mii_timer = dp->gc.gc_mii_reset_timeout;
2784 if (!dp->gc.gc_mii_dont_reset) {
2795 dp->mii_timer = dp->gc.gc_mii_an_timeout;
2804 dp->mii_interval = dp->gc.gc_mii_an_watch_interval;
2890 for (phy = dp->gc.gc_mii_addr_min; phy < 32; phy++) {
2900 for (phy = dp->gc.gc_mii_addr_min; phy < 32; phy++) {
2952 dp->gc.gc_flow_control &= ~1;
2956 dp->gc.gc_flow_control &= ~2;
2972 dp->linkup_delay = dp->gc.gc_mii_linkdown_timeout;
3081 return ((*dp->gc.gc_set_rx_filter)(dp));
3105 dp->tx_max_packets = dp->gc.gc_tx_buf_limit;
3107 if ((*dp->gc.gc_init_chip)(dp) != GEM_SUCCESS) {
3137 (*dp->gc.gc_rx_start)(dp,
3138 SLOT(dp->rx_active_head, dp->gc.gc_rx_ring_size),
3141 if ((*dp->gc.gc_start_chip)(dp) != GEM_SUCCESS) {
3229 if ((*dp->gc.gc_stop_chip)(dp) != GEM_SUCCESS) {
3232 if ((*dp->gc.gc_reset_chip)(dp) != GEM_SUCCESS) {
3249 (*dp->gc.gc_get_stats)(dp);
3286 if (dp->gc.gc_multicast_hash) {
3288 (*dp->gc.gc_multicast_hash)(dp, (uint8_t *)ep);
3440 val = BOOLEAN(dp->gc.gc_flow_control & 1);
3444 val = BOOLEAN(dp->gc.gc_flow_control & 2);
3729 if (dp->gc.gc_mii_hw_link_detection && dp->link_watcher_id == 0) {
3795 SETFUNC(dp->gc.gc_flow_control & 1),
3798 SETFUNC(dp->gc.gc_flow_control & 2),
4100 (dp->gc.gc_set_media)(dp);
4122 (void *)dp, dp->gc.gc_tx_timeout_interval);
4249 if ((*dp->gc.gc_get_stats)(dp) != GEM_SUCCESS) {
4405 val = BOOLEAN(dp->gc.gc_flow_control & 2);
4409 val = BOOLEAN(dp->gc.gc_flow_control & 1);
4700 val = gem_prop_get_int(dp, "flow-control", dp->gc.gc_flow_control);
4706 val = min(val, dp->gc.gc_flow_control);
4727 #define GEM_LOCAL_DATA_SIZE(gc) \
4730 sizeof (struct txbuf) * ((gc)->gc_tx_buf_size) + \
4731 sizeof (void *) * ((gc)->gc_tx_buf_size))
4735 struct gem_conf *gc, void *base, ddi_acc_handle_t *regs_handlep,
4747 if ((nports = gc->gc_nports) == 0) {
4760 dp = kmem_zalloc(GEM_LOCAL_DATA_SIZE(gc), KM_SLEEP);
4775 (void) sprintf(dp->name, gc->gc_name, nports * unit + port);
4800 dp->gc = *gc;
4801 gc = &dp->gc;
4803 gc->gc_tx_max_frags = 1;
4804 gc->gc_tx_max_descs_per_pkt = 1;
4805 gc->gc_tx_ring_size = gc->gc_tx_buf_size;
4806 gc->gc_tx_ring_limit = gc->gc_tx_buf_limit;
4807 gc->gc_tx_desc_write_oo = B_TRUE;
4809 gc->gc_nports = nports; /* fix nports */
4812 gc->gc_tx_copy_thresh = max(ETHERMIN, gc->gc_tx_copy_thresh);
4813 gc->gc_rx_copy_thresh = max(ETHERMIN, gc->gc_rx_copy_thresh);
4816 ASSERT(gc->gc_dma_attr_txbuf.dma_attr_align-1 == gc->gc_tx_buf_align);
4817 ASSERT(gc->gc_dma_attr_rxbuf.dma_attr_align-1 == gc->gc_rx_buf_align);
4818 gc->gc_rx_buf_align = max(gc->gc_rx_buf_align, IOC_LINESIZE - 1);
4819 gc->gc_dma_attr_rxbuf.dma_attr_align = gc->gc_rx_buf_align + 1;
4822 gc->gc_dma_attr_desc.dma_attr_align =
4823 max(gc->gc_dma_attr_desc.dma_attr_align, IOC_LINESIZE);
4826 if (gc->gc_get_packet == NULL) {
4827 gc->gc_get_packet = &gem_get_packet_default;
4831 if (gc->gc_rx_start == NULL) {
4832 gc->gc_rx_start = &gem_rx_start_default;
4836 if (gc->gc_rx_desc_unit_shift >= 0) {
4838 ROUNDUP(gc->gc_rx_ring_size << gc->gc_rx_desc_unit_shift,
4839 gc->gc_dma_attr_desc.dma_attr_align);
4841 if (gc->gc_tx_desc_unit_shift >= 0) {
4843 ROUNDUP(gc->gc_tx_ring_size << gc->gc_tx_desc_unit_shift,
4844 gc->gc_dma_attr_desc.dma_attr_align);
4850 for (i = 0; i < dp->gc.gc_tx_buf_size; i++) {
4852 &dp->tx_buf[SLOT(i + 1, dp->gc.gc_tx_buf_size)];
4873 dp->rx_buf_len = MAXPKTBUF(dp) + dp->gc.gc_rx_header_len;
4880 ret = (*dp->gc.gc_reset_chip)(dp);
4890 ret = (*dp->gc.gc_attach_chip)(dp);
4897 dp->gc.gc_tx_copy_thresh = dp->mtu;
4925 if ((*dp->gc.gc_mii_probe)(dp) != GEM_SUCCESS) {
4946 if (dp->gc.gc_mii_init) {
4947 if ((*dp->gc.gc_mii_init)(dp) != GEM_SUCCESS) {
5024 kmem_free((caddr_t)dp, GEM_LOCAL_DATA_SIZE(gc));
5092 kmem_free((caddr_t)dp, GEM_LOCAL_DATA_SIZE(&dp->gc));
5185 if ((*dp->gc.gc_reset_chip)(dp) != GEM_SUCCESS) {
5194 if (dp->gc.gc_mii_init) {
5195 (void) (*dp->gc.gc_mii_init)(dp);
5222 if ((dp->gc.gc_set_media)(dp) != GEM_SUCCESS) {
5230 if ((*dp->gc.gc_set_rx_filter)(dp) != GEM_SUCCESS) {
5239 dp->gc.gc_tx_timeout_interval);
5260 (*dp->gc.gc_reset_chip)(dp);