Lines Matching refs:channel
91 p_tx_ring_t ring_p, uint16_t channel);
150 int channel)
156 status = nxge_map_txdma(nxge, channel);
160 (void) npi_txdma_dump_tdc_regs(nxge->npi_handle, channel);
164 status = nxge_txdma_hw_start(nxge, channel);
166 (void) nxge_unmap_txdma_channel(nxge, channel);
167 (void) npi_txdma_dump_tdc_regs(nxge->npi_handle, channel);
171 if (!nxge->statsp->tdc_ksp[channel])
172 nxge_setup_tdc_kstats(nxge, channel);
203 nxge_uninit_txdma_channel(p_nxge_t nxgep, int channel)
207 if (nxgep->statsp->tdc_ksp[channel]) {
208 kstat_delete(nxgep->statsp->tdc_ksp[channel]);
209 nxgep->statsp->tdc_ksp[channel] = 0;
212 if (nxge_txdma_stop_channel(nxgep, channel) != NXGE_OK)
215 nxge_unmap_txdma_channel(nxgep, channel);
246 * channel The channel to reset.
263 nxge_reset_txdma_channel(p_nxge_t nxgep, uint16_t channel, uint64_t reg_data)
273 rs = npi_txdma_channel_reset(handle, channel);
276 channel);
288 TXDMA_REG_WRITE64(handle, TX_RING_KICK_REG, channel, 0);
301 * channel The channel to map.
316 nxge_init_txdma_channel_event_mask(p_nxge_t nxgep, uint16_t channel,
327 rs = npi_txdma_event_mask(handle, OP_SET, channel, mask_p);
342 * channel The channel to stop.
356 nxge_init_txdma_channel_cntl_stat(p_nxge_t nxgep, uint16_t channel,
367 rs = npi_txdma_control_status(handle, OP_SET, channel,
384 * channel The channel to enable.
385 * tx_desc_p channel's transmit descriptor ring.
386 * mbox_p channel's mailbox,
406 uint16_t channel, p_tx_ring_t tx_desc_p, p_tx_mbox_t mbox_p)
419 rs = npi_txdma_ring_config(handle, OP_SET, channel,
427 /* Add interrupt handler for this channel. */
428 if (nxge_hio_intr_add(nxgep, VP_BOUND_TX, channel) != NXGE_OK)
433 rs = npi_txdma_mbox_config(handle, OP_SET, channel,
441 rs = npi_txdma_channel_init_enable(handle, channel);
1028 "tdc channel %d opackets %d",
1131 uint8_t channel;
1164 * transmit dma channel.
1167 /* Get the control and status for this channel. */
1168 channel = ldvp->channel;
1172 "channel %d",
1173 nxgep, ldvp, channel));
1175 rs = npi_txdma_control_status(handle, OP_GET, channel, &cs);
1178 "==> nxge_tx_intr:channel %d ring index %d status 0x%08x",
1179 channel, vindex, rs));
1182 "==> nxge_tx_intr:channel %d ring index %d "
1184 channel, vindex, rs));
1188 "==> nxge_tx_intr:channel %d ring index %d "
1190 channel, vindex, rs));
1250 int channel)
1257 * Stop the dma channel and wait for the stop-done.
1263 rs = npi_txdma_channel_disable(handle, channel);
1266 "rs 0x%x", channel, rs));
1273 "channel %d (stop failed 0x%x) "
1274 "(inject err)", rs, channel));
1276 handle, channel, &intr_dbg);
1277 rs = npi_txdma_channel_disable(handle, channel);
1280 "channel %d (stop again 0x%x) "
1282 rs, channel));
1343 "==> nxge_txdma_hw_mode: channel %d", tdc));
1349 "channel %d (enable) rs 0x%x",
1368 nxge_txdma_enable_channel(p_nxge_t nxgep, uint16_t channel)
1373 "==> nxge_txdma_enable_channel: channel %d", channel));
1377 (void) npi_txdma_channel_enable(handle, channel);
1383 nxge_txdma_disable_channel(p_nxge_t nxgep, uint16_t channel)
1388 "==> nxge_txdma_disable_channel: channel %d", channel));
1392 (void) npi_txdma_channel_disable(handle, channel);
1404 * channel The channel to stop.
1423 nxge_txdma_stop_inj_err(p_nxge_t nxgep, int channel)
1432 * Stop the dma channel waits for the stop done.
1437 rs = npi_txdma_channel_disable(handle, channel);
1441 "<== nxge_txdma_stop_inj_err (channel %d): "
1442 "stopped OK", channel));
1447 "==> nxge_txdma_stop_inj_err (channel %d): stop failed (0x%x) "
1448 "injecting error", channel, rs));
1452 (void) npi_txdma_inj_int_error_set(handle, channel, &intr_dbg);
1455 rs = npi_txdma_channel_disable(handle, channel);
1459 "<== nxge_txdma_stop_inj_err (channel %d): "
1460 "stopped OK ", channel));
1468 "==> nxge_txdma_stop_inj_err (channel): stop failed (0x%x) "
1469 " (injected error but still not stopped)", channel, rs));
1495 "==> nxge_fixup_txdma_rings: channel %d",
1507 nxge_txdma_fix_channel(p_nxge_t nxgep, uint16_t channel)
1512 ring_p = nxge_txdma_get_ring(nxgep, channel);
1518 if (ring_p->tdc != channel) {
1520 "<== nxge_txdma_fix_channel: channel not matched "
1521 "ring tdc %d passed channel",
1522 ring_p->tdc, channel));
1526 nxge_txdma_fixup_channel(nxgep, ring_p, channel);
1533 nxge_txdma_fixup_channel(p_nxge_t nxgep, p_tx_ring_t ring_p, uint16_t channel)
1543 if (ring_p->tdc != channel) {
1545 "<== nxge_txdma_fixup_channel: channel not matched "
1546 "ring tdc %d passed channel",
1547 ring_p->tdc, channel));
1583 "==> nxge_txdma_hw_kick: channel %d", tdc));
1594 nxge_txdma_kick_channel(p_nxge_t nxgep, uint16_t channel)
1600 ring_p = nxge_txdma_get_ring(nxgep, channel);
1607 if (ring_p->tdc != channel) {
1609 "<== nxge_txdma_kick_channel: channel not matched "
1610 "ring tdc %d passed channel",
1611 ring_p->tdc, channel));
1615 nxge_txdma_hw_kick_channel(nxgep, ring_p, channel);
1622 nxge_txdma_hw_kick_channel(p_nxge_t nxgep, p_tx_ring_t ring_p, uint16_t channel)
1685 * channel The channel to reset.
1757 * ring <channel>'s ring.
1758 * channel The channel to reset.
1773 nxge_txdma_channel_hung(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, uint16_t channel)
1785 "==> nxge_txdma_channel_hung: channel %d", channel));
1797 channel, tx_rd_index, tail_index, tail_wrap));
1802 (void) npi_txdma_ring_head_get(handle, channel, &tx_head);
1841 * channel The channel to reset.
1893 * channel The channel to fix.
1915 nxge_txdma_fix_hung_channel(p_nxge_t nxgep, uint16_t channel)
1920 ring_p = nxge_txdma_get_ring(nxgep, channel);
1927 if (ring_p->tdc != channel) {
1929 "<== nxge_txdma_fix_hung_channel: channel not matched "
1930 "ring tdc %d passed channel",
1931 ring_p->tdc, channel));
1935 nxge_txdma_fixup_channel(nxgep, ring_p, channel);
1943 uint16_t channel)
1957 if (ring_p->tdc != channel) {
1959 "<== nxge_txdma_fixup_hung_channel: channel "
1961 "ring tdc %d passed channel",
1962 ring_p->tdc, channel));
1973 * Stop the dma channel waits for the stop done.
1977 status = npi_txdma_channel_disable(handle, channel);
1981 "ring tdc %d passed channel %d",
1982 ring_p->tdc, channel));
1989 (void) npi_txdma_inj_int_error_set(handle, channel, &intr_dbg);
1992 status = npi_txdma_channel_disable(handle, channel);
1996 "ring tdc %d passed channel",
1997 ring_p->tdc, channel));
2003 "ring tdc %d passed channel",
2004 ring_p->tdc, channel));
2091 nxge_txdma_regs_dump(p_nxge_t nxgep, int channel)
2104 nxgep->function_num, channel);
2107 (void) npi_txdma_log_page_get(handle, channel, &cfg);
2111 (void) npi_txdma_log_page_get(handle, channel, &cfg);
2115 (void) npi_txdma_ring_head_get(handle, channel, &hdl);
2116 (void) npi_txdma_desc_kick_reg_get(handle, channel, &kick);
2124 (void) npi_txdma_control_status(handle, OP_GET, channel, &cs);
2130 (void) npi_txc_dma_max_burst(handle, OP_GET, channel, &burst);
2131 (void) npi_txc_dma_bytes_transmitted(handle, channel, &bytes);
2158 * channel The channel to map.
2171 nxge_t *nxgep, int channel)
2177 ring = nxgep->tx_rings->rings[channel];
2178 data = nxgep->tx_buf_pool_p->dma_buf_pool_p[channel];
2195 control = nxgep->tx_cntl_pool_p->dma_buf_pool_p[channel];
2213 nxge_map_txdma(p_nxge_t nxgep, int channel)
2233 if (nxge_alloc_txb(nxgep, channel) != NXGE_OK)
2236 num_chunks = nxgep->tx_buf_pool_p->num_chunks[channel];
2237 pData = &nxgep->tx_buf_pool_p->dma_buf_pool_p[channel];
2238 pControl = &nxgep->tx_cntl_pool_p->dma_buf_pool_p[channel];
2239 pRing = &nxgep->tx_rings->rings[channel];
2240 mailbox = &nxgep->tx_mbox_areas_p->txmbox_areas_p[channel];
2247 * Map descriptors from the buffer pools for <channel>.
2254 status = nxge_map_txdma_channel(nxgep, channel,
2260 nxgep, channel, status));
2266 ring->index = (uint16_t)channel;
2267 ring->tdc_stats = &nxgep->statsp->tdc_stats[channel];
2271 (void) nxge_tdc_lp_conf(nxgep, channel);
2273 nxge_tdc_hvio_setup(nxgep, channel);
2278 "(status 0x%x channel %d)", status, channel));
2284 nxge_map_txdma_channel(p_nxge_t nxgep, uint16_t channel,
2298 "==> nxge_map_txdma_channel (channel %d)", channel));
2302 status = nxge_map_txdma_channel_buf_ring(nxgep, channel,
2306 "==> nxge_map_txdma_channel (channel %d): "
2307 "map buffer failed 0x%x", channel, status));
2314 nxge_map_txdma_channel_cfg_ring(nxgep, channel, dma_cntl_p, *tx_desc_p,
2322 "(status 0x%x channel %d)",
2323 status, channel));
2329 "(status 0x%x channel %d)",
2330 status, channel));
2337 nxge_unmap_txdma_channel(p_nxge_t nxgep, uint16_t channel)
2343 "==> nxge_unmap_txdma_channel (channel %d)", channel));
2347 ring = nxgep->tx_rings->rings[channel];
2348 mailbox = nxgep->tx_mbox_areas_p->txmbox_areas_p[channel];
2355 nxge_free_txb(nxgep, channel);
2360 nxgep->tx_rings->rings[channel] = NULL;
2369 * This function allocates all of the per-channel data structures.
2373 * dma_channel The channel to map.
2429 "==> nxge_map_txdma_channel_cfg_ring: channel %d des $%p",
2440 "==> nxge_map_txdma_channel_cfg_ring: channel %d cfg 0x%llx",
2496 "==> nxge_unmap_txdma_channel_cfg_ring: channel %d",
2511 * channel The channel to map.
2513 * tx_desc_p channel's descriptor ring
2528 nxge_map_txdma_channel_buf_ring(p_nxge_t nxgep, uint16_t channel,
2549 " nxge_map_txdma_channel_buf_ring: channel %d to map %d "
2551 channel, num_chunks, dma_bufp));
2557 "==> nxge_map_txdma_channel_buf_ring: channel %d "
2559 channel, tmp_bufp, tmp_bufp->nblocks, nmsgs));
2563 "<== nxge_map_txdma_channel_buf_ring: channel %d "
2565 channel));
2580 nxgep->instance, channel);
2608 tx_ring_p->tdc = channel;
2623 "==> nxge_map_txdma_channel_buf_ring: channel %d "
2626 channel, tx_ring_p->tx_ring_size, nmsgs,
2712 "==> nxge_unmap_txdma_channel_buf_ring: channel %d",
2727 "channel %d",
2762 nxge_txdma_hw_start(p_nxge_t nxgep, int channel)
2791 status = nxge_txdma_start_channel(nxgep, channel,
2792 (p_tx_ring_t)tx_desc_rings[channel],
2793 (p_tx_mbox_t)tx_mbox_p[channel]);
2810 "(status 0x%x channel %d)", status, channel));
2826 * channel The channel to start.
2827 * tx_ring_p channel's transmit descriptor ring.
2828 * tx_mbox_p channel' smailbox.
2844 nxge_txdma_start_channel(p_nxge_t nxgep, uint16_t channel,
2851 "==> nxge_txdma_start_channel (channel %d)", channel));
2855 (void) nxge_txdma_stop_inj_err(nxgep, channel);
2858 * Reset TXDMA channel
2862 status = nxge_reset_txdma_channel(nxgep, channel,
2866 "==> nxge_txdma_start_channel (channel %d)"
2867 " reset channel failed 0x%x", channel, status));
2872 * Initialize the TXDMA channel specific FZC control
2874 * to each TX channel (i.e. logical pages).
2877 status = nxge_init_fzc_txdma_channel(nxgep, channel,
2889 channel, &tx_ring_p->tx_evmask);
2897 * enable each DMA channel.
2899 status = nxge_enable_txdma_channel(nxgep, channel,
2918 * channel The channel to stop.
2919 * tx_ring_p channel's transmit descriptor ring.
2920 * tx_mbox_p channel' smailbox.
2939 nxge_txdma_stop_channel(p_nxge_t nxgep, uint16_t channel)
2945 "==> nxge_txdma_stop_channel: channel %d", channel));
2952 (void) nxge_txdma_stop_inj_err(nxgep, channel);
2959 tx_ring_p = nxgep->tx_rings->rings[channel];
2966 * Reset TXDMA channel
2970 status = nxge_reset_txdma_channel(nxgep, channel,
2980 channel, &tx_ring_p->tx_evmask);
2987 status = nxge_init_txdma_channel_cntl_stat(nxgep, channel,
2993 tx_mbox_p = nxgep->tx_mbox_areas_p->txmbox_areas_p[channel];
2995 /* Disable channel */
2996 status = nxge_disable_txdma_channel(nxgep, channel,
3019 * channel
3031 nxge_txdma_get_ring(p_nxge_t nxgep, uint16_t channel)
3048 if (channel == ring->tdc) {
3072 * channel
3084 nxge_txdma_get_mbox(p_nxge_t nxgep, uint16_t channel)
3108 if (channel == ring->tdc) {
3136 * ldvp Used to get the channel number ONLY.
3162 uint8_t channel;
3173 channel = ldvp->channel;
3181 if ((rs = npi_txdma_ring_error_get(handle, channel,
3188 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3191 "==> nxge_tx_err_evnts(channel %d): "
3192 "fatal error: mailbox", channel));
3197 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3200 "==> nxge_tx_err_evnts(channel %d): "
3201 "fatal error: pkt_size_err", channel));
3206 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3209 "==> nxge_tx_err_evnts(channel %d): "
3210 "fatal error: tx_ring_oflow", channel));
3215 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3218 "==> nxge_tx_err_evnts(channel %d): "
3219 "fatal error: pre_buf_par_err", channel));
3223 par_err.bits.ldw.inject_parity_error &= ~(1 << channel);
3229 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3232 "==> nxge_tx_err_evnts(channel %d): "
3233 "fatal error: nack_pref", channel));
3238 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3241 "==> nxge_tx_err_evnts(channel %d): "
3242 "fatal error: nack_pkt_rd", channel));
3247 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3250 "==> nxge_tx_err_evnts(channel %d): "
3251 "fatal error: config_partition_err", channel));
3256 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3259 "==> nxge_tx_err_evnts(channel %d): "
3260 "fatal error: pkt_prt_err", channel));
3265 TXDMA_REG_WRITE64(nxgep->npi_handle, TDMC_INTR_DBG_REG, channel, 0);
3270 " fatal error on channel %d cs 0x%llx\n",
3271 channel, cs.value));
3272 status = nxge_txdma_fatal_err_recover(nxgep, channel,
3287 uint16_t channel,
3297 "Recovering from TxDMAChannel#%d error...", channel));
3300 * Stop the dma channel waits for the stop done.
3306 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel stop..."));
3308 rs = npi_txdma_channel_control(handle, TXDMA_STOP, channel);
3311 "==> nxge_txdma_fatal_err_recover (channel %d): "
3312 "stop failed ", channel));
3316 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel reclaim..."));
3320 * Reset TXDMA channel
3322 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel reset..."));
3323 if ((rs = npi_txdma_channel_control(handle, TXDMA_RESET, channel)) !=
3326 "==> nxge_txdma_fatal_err_recover (channel %d)"
3327 " reset channel failed 0x%x", channel, rs));
3336 TXDMA_REG_WRITE64(handle, TX_RING_KICK_REG, channel, 0);
3338 /* Restart TXDMA channel */
3341 tx_mbox_p = nxge_txdma_get_mbox(nxgep, channel);
3345 * Initialize the TXDMA channel specific FZC control
3347 * to each TX channel (i.e. logical pages).
3349 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel restart..."));
3350 status = nxge_init_fzc_txdma_channel(nxgep, channel,
3360 status = nxge_init_txdma_channel_event_mask(nxgep, channel,
3372 * enable each DMA channel.
3374 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel enable..."));
3375 status = nxge_enable_txdma_channel(nxgep, channel,
3383 channel));
3392 "nxge_txdma_fatal_err_recover (channel %d): "
3393 "failed to recover this txdma channel", channel));
3474 "(channel %d): stop failed ", tdc));
3506 "(channel %d) reset channel "
3604 * chan The channel to inject into.