Lines Matching defs:nxgep
90 static void nxge_txdma_fixup_hung_channel(p_nxge_t nxgep,
94 nxge_init_txdma_channels(p_nxge_t nxgep)
96 nxge_grp_set_t *set = &nxgep->tx_set;
102 NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "==> nxge_init_txdma_channels"));
108 nxgep->pt_config.hw_config.def_mac_txdma_grpid + i;
109 map = nxgep->pt_config.tdc_grps[dev_gindex].map;
112 if ((nxge_grp_dc_add(nxgep,
122 NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "<== nxge_init_txdma_channels"));
130 nxgep->pt_config.hw_config.def_mac_txdma_grpid + i;
131 map = nxgep->pt_config.tdc_grps[dev_gindex].map;
134 nxge_grp_dc_remove(nxgep,
180 nxge_uninit_txdma_channels(p_nxge_t nxgep)
182 nxge_grp_set_t *set = &nxgep->tx_set;
185 NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "==> nxge_uninit_txdma_channels"));
188 NXGE_DEBUG_MSG((nxgep, MEM2_CTL,
195 nxge_grp_dc_remove(nxgep, VP_BOUND_TX, tdc);
199 NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "<== nxge_uninit_txdma_channels"));
203 nxge_uninit_txdma_channel(p_nxge_t nxgep, int channel)
205 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_uninit_txdma_channel"));
207 if (nxgep->statsp->tdc_ksp[channel]) {
208 kstat_delete(nxgep->statsp->tdc_ksp[channel]);
209 nxgep->statsp->tdc_ksp[channel] = 0;
212 if (nxge_txdma_stop_channel(nxgep, channel) != NXGE_OK)
215 nxge_unmap_txdma_channel(nxgep, channel);
218 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "<== nxge_uninit_txdma_channel"));
245 * nxgep
263 nxge_reset_txdma_channel(p_nxge_t nxgep, uint16_t channel, uint64_t reg_data)
269 NXGE_DEBUG_MSG((nxgep, TX_CTL, " ==> nxge_reset_txdma_channel"));
271 handle = NXGE_DEV_NPI_HANDLE(nxgep);
290 NXGE_DEBUG_MSG((nxgep, TX_CTL, " <== nxge_reset_txdma_channel"));
300 * nxgep
316 nxge_init_txdma_channel_event_mask(p_nxge_t nxgep, uint16_t channel,
323 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
326 handle = NXGE_DEV_NPI_HANDLE(nxgep);
341 * nxgep
356 nxge_init_txdma_channel_cntl_stat(p_nxge_t nxgep, uint16_t channel,
363 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
366 handle = NXGE_DEV_NPI_HANDLE(nxgep);
383 * nxgep
405 nxge_enable_txdma_channel(p_nxge_t nxgep,
412 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_enable_txdma_channel"));
414 handle = NXGE_DEV_NPI_HANDLE(nxgep);
426 if (isLDOMguest(nxgep)) {
428 if (nxge_hio_intr_add(nxgep, VP_BOUND_TX, channel) != NXGE_OK)
447 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "<== nxge_enable_txdma_channel"));
901 nxge_txdma_reclaim(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, int nmblks)
922 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_reclaim"));
926 NXGE_DEBUG_MSG((nxgep, TX_CTL,
933 handle = NXGE_DEV_NPI_HANDLE(nxgep);
950 NXGE_DEBUG_MSG((nxgep, TX_CTL,
963 NXGE_DEBUG_MSG((nxgep, TX_CTL,
974 NXGE_DEBUG_MSG((nxgep, TX_CTL,
979 NXGE_DEBUG_MSG((nxgep, TX_CTL,
984 NXGE_DEBUG_MSG((nxgep, TX_CTL,
990 NXGE_DEBUG_MSG((nxgep, TX_CTL,
997 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1000 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1005 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1013 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1020 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1026 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1034 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1053 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1063 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1094 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1129 p_nxge_t nxgep = (p_nxge_t)arg2;
1143 "<== nxge_tx_intr: nxgep $%p ldvp $%p",
1144 nxgep, ldvp));
1148 if (arg2 == NULL || (void *)ldvp->nxgep != arg2) {
1149 nxgep = ldvp->nxgep;
1151 NXGE_DEBUG_MSG((nxgep, INT_CTL,
1152 "==> nxge_tx_intr: nxgep(arg2) $%p ldvp(arg1) $%p",
1153 nxgep, ldvp));
1155 if ((!(nxgep->drv_state & STATE_HW_INITIALIZED)) ||
1156 (nxgep->nxge_mac_state != NXGE_MAC_STARTED)) {
1157 NXGE_DEBUG_MSG((nxgep, INT_CTL,
1166 handle = NXGE_DEV_NPI_HANDLE(nxgep);
1170 NXGE_DEBUG_MSG((nxgep, INT_CTL,
1171 "==> nxge_tx_intr: nxgep $%p ldvp (ldvp) $%p "
1173 nxgep, ldvp, channel));
1177 NXGE_DEBUG_MSG((nxgep, INT_CTL,
1181 NXGE_DEBUG_MSG((nxgep, INT_CTL,
1185 tx_rings = nxgep->tx_rings->rings;
1187 NXGE_DEBUG_MSG((nxgep, INT_CTL,
1199 status = nxge_tx_err_evnts(nxgep, ldvp->vdma_index, ldvp, cs);
1205 NXGE_DEBUG_MSG((nxgep, INT_CTL,
1208 if (isLDOMguest(nxgep)) {
1209 nxge_hio_ldgimgn(nxgep, ldgp);
1217 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_tx_intr"));
1223 nxge_txdma_stop(p_nxge_t nxgep) /* Dead */
1225 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_stop"));
1227 (void) nxge_link_monitor(nxgep, LINK_MONITOR_STOP);
1229 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_stop"));
1233 nxge_txdma_stop_start(p_nxge_t nxgep) /* Dead */
1235 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_stop_start"));
1237 (void) nxge_txdma_stop(nxgep);
1239 (void) nxge_fixup_txdma_rings(nxgep);
1240 (void) nxge_txdma_hw_mode(nxgep, NXGE_DMA_START);
1241 (void) nxge_tx_mac_enable(nxgep);
1242 (void) nxge_txdma_hw_kick(nxgep);
1244 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_stop_start"));
1294 * nxgep
1312 nxge_txdma_hw_mode(p_nxge_t nxgep, boolean_t enable)
1314 nxge_grp_set_t *set = &nxgep->tx_set;
1321 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
1324 if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) {
1325 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1330 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
1331 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1337 handle = NXGE_DEV_NPI_HANDLE(nxgep);
1340 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
1342 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
1347 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
1353 (nxgep, tdc);
1361 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
1368 nxge_txdma_enable_channel(p_nxge_t nxgep, uint16_t channel)
1372 NXGE_DEBUG_MSG((nxgep, DMA_CTL,
1375 handle = NXGE_DEV_NPI_HANDLE(nxgep);
1379 NXGE_DEBUG_MSG((nxgep, DMA_CTL, "<== nxge_txdma_enable_channel"));
1383 nxge_txdma_disable_channel(p_nxge_t nxgep, uint16_t channel)
1387 NXGE_DEBUG_MSG((nxgep, DMA_CTL,
1390 handle = NXGE_DEV_NPI_HANDLE(nxgep);
1394 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_disable_channel"));
1403 * nxgep
1412 * nxge_txdma_regs_dump_channels(nxgep);
1423 nxge_txdma_stop_inj_err(p_nxge_t nxgep, int channel)
1430 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_stop_inj_err"));
1436 handle = NXGE_DEV_NPI_HANDLE(nxgep);
1440 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1446 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
1458 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1465 nxge_txdma_regs_dump_channels(nxgep);
1467 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
1471 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_stop_inj_err"));
1477 nxge_fixup_txdma_rings(p_nxge_t nxgep)
1479 nxge_grp_set_t *set = &nxgep->tx_set;
1482 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_fixup_txdma_rings"));
1484 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
1485 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1492 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
1494 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
1497 nxge_txdma_fixup_channel(nxgep, ring, tdc);
1502 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_fixup_txdma_rings"));
1507 nxge_txdma_fix_channel(p_nxge_t nxgep, uint16_t channel)
1511 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_fix_channel"));
1512 ring_p = nxge_txdma_get_ring(nxgep, channel);
1514 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_fix_channel"));
1519 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1526 nxge_txdma_fixup_channel(nxgep, ring_p, channel);
1528 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_fix_channel"));
1533 nxge_txdma_fixup_channel(p_nxge_t nxgep, p_tx_ring_t ring_p, uint16_t channel)
1535 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_fixup_channel"));
1538 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1544 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1552 (void) nxge_txdma_reclaim(nxgep, ring_p, 0);
1560 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_fixup_channel"));
1565 nxge_txdma_hw_kick(p_nxge_t nxgep)
1567 nxge_grp_set_t *set = &nxgep->tx_set;
1570 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_hw_kick"));
1572 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
1573 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1580 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
1582 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
1584 nxge_txdma_hw_kick_channel(nxgep, ring, tdc);
1589 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_hw_kick"));
1594 nxge_txdma_kick_channel(p_nxge_t nxgep, uint16_t channel)
1598 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_kick_channel"));
1600 ring_p = nxge_txdma_get_ring(nxgep, channel);
1602 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1608 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1615 nxge_txdma_hw_kick_channel(nxgep, ring_p, channel);
1617 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_kick_channel"));
1622 nxge_txdma_hw_kick_channel(p_nxge_t nxgep, p_tx_ring_t ring_p, uint16_t channel)
1625 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_hw_kick_channel"));
1628 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1633 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_hw_kick_channel"));
1639 * Check the state of all TDCs belonging to nxgep.
1642 * nxgep
1656 nxge_check_tx_hang(p_nxge_t nxgep)
1658 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_check_tx_hang"));
1660 if ((!(nxgep->drv_state & STATE_HW_INITIALIZED)) ||
1661 (nxgep->nxge_mac_state != NXGE_MAC_STARTED)) {
1670 if (nxge_txdma_hung(nxgep)) {
1671 nxge_fixup_hung_txdma_rings(nxgep);
1675 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_check_tx_hang"));
1684 * nxgep
1700 nxge_txdma_hung(p_nxge_t nxgep)
1702 nxge_grp_set_t *set = &nxgep->tx_set;
1706 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_hung"));
1708 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
1709 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1718 if (isLDOMservice(nxgep)) {
1720 (nxge_hio_data_t *)nxgep->nxge_hw_p->hio;
1723 shared = nxgep->tdc_is_shared[tdc];
1733 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
1735 if (nxge_txdma_channel_hung(nxgep, ring, tdc)) {
1736 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1745 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_hung"));
1756 * nxgep
1773 nxge_txdma_channel_hung(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, uint16_t channel)
1781 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_channel_hung"));
1783 handle = NXGE_DEV_NPI_HANDLE(nxgep);
1784 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1787 (void) nxge_txdma_reclaim(nxgep, tx_ring_p, 0);
1794 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1805 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1815 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1820 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1824 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1829 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_channel_hung"));
1840 * nxgep
1858 nxge_fixup_hung_txdma_rings(p_nxge_t nxgep)
1860 nxge_grp_set_t *set = &nxgep->tx_set;
1863 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_fixup_hung_txdma_rings"));
1865 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
1866 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1873 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
1875 nxge_txdma_fixup_hung_channel(nxgep, ring, tdc);
1876 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1883 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_fixup_hung_txdma_rings"));
1892 * nxgep
1915 nxge_txdma_fix_hung_channel(p_nxge_t nxgep, uint16_t channel)
1919 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_fix_hung_channel"));
1920 ring_p = nxge_txdma_get_ring(nxgep, channel);
1922 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1928 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1935 nxge_txdma_fixup_channel(nxgep, ring_p, channel);
1937 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_fix_hung_channel"));
1942 nxge_txdma_fixup_hung_channel(p_nxge_t nxgep, p_tx_ring_t ring_p,
1949 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_fixup_hung_channel"));
1952 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1958 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1968 (void) nxge_txdma_reclaim(nxgep, ring_p, 0);
1971 handle = NXGE_DEV_NPI_HANDLE(nxgep);
1979 NXGE_DEBUG_MSG((nxgep, TX_CTL,
1994 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2001 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2006 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_fixup_hung_channel"));
2011 nxge_reclaim_rings(p_nxge_t nxgep)
2013 nxge_grp_set_t *set = &nxgep->tx_set;
2016 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_reclaim_rings"));
2018 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
2019 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2026 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
2028 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2031 (void) nxge_txdma_reclaim(nxgep, ring, 0);
2037 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_reclaim_rings"));
2041 nxge_txdma_regs_dump_channels(p_nxge_t nxgep)
2043 nxge_grp_set_t *set = &nxgep->tx_set;
2047 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_regs_dump_channels"));
2049 handle = NXGE_DEV_NPI_HANDLE(nxgep);
2051 if (!isLDOMguest(nxgep)) {
2056 (void) npi_txc_dump_port_fzc_regs(handle, nxgep->function_num);
2059 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
2060 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2067 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
2069 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2075 if (!isLDOMguest(nxgep)) {
2076 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2082 nxge_txdma_regs_dump(nxgep, tdc);
2087 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_regs_dump"));
2091 nxge_txdma_regs_dump(p_nxge_t nxgep, int channel)
2104 nxgep->function_num, channel);
2106 handle = NXGE_DEV_NPI_HANDLE(nxgep);
2129 (void) npi_txc_port_dma_list_get(handle, nxgep->function_num, &bitmap);
2142 (void) npi_ipp_get_status(handle, nxgep->function_num, &status);
2157 * nxgep
2171 nxge_t *nxgep, int channel)
2177 ring = nxgep->tx_rings->rings[channel];
2178 data = nxgep->tx_buf_pool_p->dma_buf_pool_p[channel];
2187 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_map_txdma_channel: "
2195 control = nxgep->tx_cntl_pool_p->dma_buf_pool_p[channel];
2202 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_map_txdma_channel: "
2213 nxge_map_txdma(p_nxge_t nxgep, int channel)
2223 NXGE_ERROR_MSG((nxgep, MEM3_CTL, "==> nxge_map_txdma"));
2225 if (!nxgep->tx_cntl_pool_p->buf_allocated) {
2226 if (nxge_alloc_tx_mem_pool(nxgep) != NXGE_OK) {
2227 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
2233 if (nxge_alloc_txb(nxgep, channel) != NXGE_OK)
2236 num_chunks = nxgep->tx_buf_pool_p->num_chunks[channel];
2237 pData = &nxgep->tx_buf_pool_p->dma_buf_pool_p[channel];
2238 pControl = &nxgep->tx_cntl_pool_p->dma_buf_pool_p[channel];
2239 pRing = &nxgep->tx_rings->rings[channel];
2240 mailbox = &nxgep->tx_mbox_areas_p->txmbox_areas_p[channel];
2242 NXGE_ERROR_MSG((nxgep, MEM3_CTL, "==> nxge_map_txdma: "
2244 nxgep->tx_rings, nxgep->tx_rings->rings));
2254 status = nxge_map_txdma_channel(nxgep, channel,
2257 NXGE_ERROR_MSG((nxgep, MEM3_CTL,
2260 nxgep, channel, status));
2267 ring->tdc_stats = &nxgep->statsp->tdc_stats[channel];
2270 if (isLDOMguest(nxgep)) {
2271 (void) nxge_tdc_lp_conf(nxgep, channel);
2273 nxge_tdc_hvio_setup(nxgep, channel);
2277 NXGE_ERROR_MSG((nxgep, MEM3_CTL, "==> nxge_map_txdma: "
2284 nxge_map_txdma_channel(p_nxge_t nxgep, uint16_t channel,
2297 NXGE_ERROR_MSG((nxgep, MEM3_CTL,
2302 status = nxge_map_txdma_channel_buf_ring(nxgep, channel,
2305 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
2314 nxge_map_txdma_channel_cfg_ring(nxgep, channel, dma_cntl_p, *tx_desc_p,
2320 NXGE_ERROR_MSG((nxgep, MEM3_CTL,
2324 nxge_unmap_txdma_channel_buf_ring(nxgep, *tx_desc_p);
2327 NXGE_ERROR_MSG((nxgep, MEM3_CTL,
2337 nxge_unmap_txdma_channel(p_nxge_t nxgep, uint16_t channel)
2342 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2347 ring = nxgep->tx_rings->rings[channel];
2348 mailbox = nxgep->tx_mbox_areas_p->txmbox_areas_p[channel];
2350 (void) nxge_unmap_txdma_channel_cfg_ring(nxgep, ring, mailbox);
2353 (void) nxge_unmap_txdma_channel_buf_ring(nxgep, ring);
2355 nxge_free_txb(nxgep, channel);
2360 nxgep->tx_rings->rings[channel] = NULL;
2362 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "<== nxge_unmap_txdma_channel"));
2372 * nxgep
2391 nxge_map_txdma_channel_cfg_ring(p_nxge_t nxgep, uint16_t dma_channel,
2407 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2428 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2439 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2455 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2465 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2468 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2486 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2492 nxge_unmap_txdma_channel_cfg_ring(p_nxge_t nxgep,
2495 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2501 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2510 * nxgep
2528 nxge_map_txdma_channel_buf_ring(p_nxge_t nxgep, uint16_t channel,
2544 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2548 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2556 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2562 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2573 (void *)nxgep->interrupt_cookie);
2577 tx_ring_p->nxgep = nxgep;
2580 nxgep->instance, channel);
2581 tx_ring_p->taskq = ddi_taskq_create(nxgep->dip, qname, 1,
2594 ddi_status = ddi_dma_alloc_handle(nxgep->dip, &nxge_tx_dma_attr,
2603 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
2622 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2635 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_map_txdma_channel_buf_ring: "
2644 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2653 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2690 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2698 nxge_unmap_txdma_channel_buf_ring(p_nxge_t nxgep, p_tx_ring_t tx_ring_p)
2704 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2707 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2711 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2725 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2729 (void) nxge_txdma_reclaim(nxgep, tx_ring_p, 0);
2757 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2762 nxge_txdma_hw_start(p_nxge_t nxgep, int channel)
2770 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_txdma_hw_start"));
2772 tx_rings = nxgep->tx_rings;
2774 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2780 NXGE_DEBUG_MSG((nxgep, TX_CTL,
2785 NXGE_ERROR_MSG((nxgep, MEM3_CTL, "==> nxge_txdma_hw_start: "
2788 tx_mbox_areas_p = nxgep->tx_mbox_areas_p;
2791 status = nxge_txdma_start_channel(nxgep, channel,
2798 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_txdma_hw_start: "
2800 nxgep->tx_rings, nxgep->tx_rings->rings));
2801 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_txdma_hw_start: "
2803 nxgep->tx_rings, tx_desc_rings));
2808 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2813 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2825 * nxgep
2844 nxge_txdma_start_channel(p_nxge_t nxgep, uint16_t channel,
2850 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2855 (void) nxge_txdma_stop_inj_err(nxgep, channel);
2862 status = nxge_reset_txdma_channel(nxgep, channel,
2865 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
2876 if (!isLDOMguest(nxgep)) {
2877 status = nxge_init_fzc_txdma_channel(nxgep, channel,
2888 status = nxge_init_txdma_channel_event_mask(nxgep,
2899 status = nxge_enable_txdma_channel(nxgep, channel,
2906 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "<== nxge_txdma_start_channel"));
2917 * nxgep
2939 nxge_txdma_stop_channel(p_nxge_t nxgep, uint16_t channel)
2944 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
2952 (void) nxge_txdma_stop_inj_err(nxgep, channel);
2954 if (nxgep->tx_rings == NULL) {
2959 tx_ring_p = nxgep->tx_rings->rings[channel];
2970 status = nxge_reset_txdma_channel(nxgep, channel,
2979 status = nxge_init_txdma_channel_event_mask(nxgep,
2987 status = nxge_init_txdma_channel_cntl_stat(nxgep, channel,
2993 tx_mbox_p = nxgep->tx_mbox_areas_p->txmbox_areas_p[channel];
2996 status = nxge_disable_txdma_channel(nxgep, channel,
3002 NXGE_DEBUG_MSG((nxgep, MEM3_CTL,
3008 NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "<== nxge_txdma_stop_channel"));
3018 * nxgep
3031 nxge_txdma_get_ring(p_nxge_t nxgep, uint16_t channel)
3033 nxge_grp_set_t *set = &nxgep->tx_set;
3036 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_get_ring"));
3038 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
3039 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3046 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
3049 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3059 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_get_ring: "
3071 * nxgep
3084 nxge_txdma_get_mbox(p_nxge_t nxgep, uint16_t channel)
3086 nxge_grp_set_t *set = &nxgep->tx_set;
3089 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_get_mbox"));
3091 if (nxgep->tx_mbox_areas_p == 0 ||
3092 nxgep->tx_mbox_areas_p->txmbox_areas_p == 0) {
3093 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3098 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
3099 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3106 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
3109 tx_mbox_t *mailbox = nxgep->
3112 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3122 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_get_mbox: "
3134 * nxgep
3158 nxge_tx_err_evnts(p_nxge_t nxgep, uint_t index, p_nxge_ldv_t ldvp, tx_cs_t cs)
3171 NXGE_DEBUG_MSG((nxgep, TX2_CTL, "==> nxge_tx_err_evnts"));
3172 handle = NXGE_DEV_NPI_HANDLE(nxgep);
3175 tx_rings = nxgep->tx_rings->rings;
3188 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3190 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3197 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3199 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3206 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3208 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3215 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3217 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3229 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3231 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3238 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3240 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3247 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3249 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3256 NXGE_FM_REPORT_ERROR(nxgep, nxgep->mac.portnum, channel,
3258 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3265 TXDMA_REG_WRITE64(nxgep->npi_handle, TDMC_INTR_DBG_REG, channel, 0);
3268 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3272 status = nxge_txdma_fatal_err_recover(nxgep, channel,
3275 FM_SERVICE_RESTORED(nxgep);
3279 NXGE_DEBUG_MSG((nxgep, TX2_CTL, "<== nxge_tx_err_evnts"));
3286 p_nxge_t nxgep,
3295 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_txdma_fatal_err_recover"));
3296 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3305 handle = NXGE_DEV_NPI_HANDLE(nxgep);
3306 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel stop..."));
3310 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3316 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel reclaim..."));
3317 (void) nxge_txdma_reclaim(nxgep, tx_ring_p, 0);
3322 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel reset..."));
3325 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3340 if (!isLDOMguest(nxgep)) {
3341 tx_mbox_p = nxge_txdma_get_mbox(nxgep, channel);
3349 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel restart..."));
3350 status = nxge_init_fzc_txdma_channel(nxgep, channel,
3360 status = nxge_init_txdma_channel_event_mask(nxgep, channel,
3374 NXGE_DEBUG_MSG((nxgep, TX_CTL, "TxDMA channel enable..."));
3375 status = nxge_enable_txdma_channel(nxgep, channel,
3381 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3384 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_txdma_fatal_err_recover"));
3391 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3394 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "Recovery failed"));
3405 * nxgep
3418 nxge_tx_port_fatal_err_recover(p_nxge_t nxgep)
3420 nxge_grp_set_t *set = &nxgep->tx_set;
3430 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_tx_port_fatal_err_recover"));
3431 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3434 if (isLDOMguest(nxgep)) {
3438 if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) {
3439 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3444 if (nxgep->tx_rings == 0 || nxgep->tx_rings->rings == 0) {
3445 NXGE_DEBUG_MSG((nxgep, TX_CTL,
3453 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
3459 handle = NXGE_DEV_NPI_HANDLE(nxgep);
3467 ring = nxgep->tx_rings->rings[tdc];
3472 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3481 NXGE_DEBUG_MSG((nxgep, TX_CTL, "Reclaiming all TDCs..."));
3485 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
3487 (void) nxge_txdma_reclaim(nxgep, ring, 0);
3495 NXGE_DEBUG_MSG((nxgep, TX_CTL, "Resetting all TDCs..."));
3499 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
3504 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
3520 NXGE_DEBUG_MSG((nxgep, TX_CTL, "Restarting all TDCs..."));
3525 ring = nxgep->tx_rings->rings[tdc];
3527 mailbox = nxge_txdma_get_mbox(nxgep, tdc);
3528 status = nxge_init_fzc_txdma_channel(nxgep, tdc,
3535 (nxgep, tdc, &ring->tx_evmask);
3549 NXGE_DEBUG_MSG((nxgep, TX_CTL, "Re-enabling all TDCs..."));
3554 ring = nxgep->tx_rings->rings[tdc];
3556 mailbox = nxge_txdma_get_mbox(nxgep, tdc);
3557 status = nxge_enable_txdma_channel(nxgep, tdc,
3570 tx_ring_t *ring = nxgep->tx_rings->rings[tdc];
3576 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "Tx port recovery succeeded"));
3577 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_tx_port_fatal_err_recover"));
3584 ring = nxgep->tx_rings->rings[tdc];
3590 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "Tx port recovery failed"));
3591 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_tx_port_fatal_err_recover"));
3602 * nxgep
3623 nxge_txdma_inject_err(p_nxge_t nxgep, uint32_t err_id, uint8_t chan)
3633 handle = NXGE_DEV_NPI_HANDLE(nxgep);
3656 TXDMA_REG_READ64(nxgep->npi_handle, TDMC_INTR_DBG_REG,
3681 TXDMA_REG_WRITE64(nxgep->npi_handle, TDMC_INTR_DBG_REG,