Lines Matching refs:control
1812 * Get the control and status for this channel.
1957 * a hardware control status register will be updated with the number of
2815 * Get the control and status for this channel.
2889 * Get the control and status for this channel.
3218 nxge_dma_common_t **control;
3251 control = &nxgep->rx_cntl_pool_p->dma_buf_pool_p[channel];
3257 chunks, control, rcr_ring, mailbox);
4106 * function zero control registers. These FZC registers
4112 * Initialize the RXDMA port specific FZC control configurations.
4255 * Initialize the RXDMA channel specific FZC control
4292 /* Initialize the receive DMA control and status register */
4304 "init rxdma control register failed (0x%08x channel %d",
4310 "control done - channel %d cs 0x%016llx", channel, cs.value));
4357 "control done - channel %d cs 0x%016llx", channel, cs.value));
4426 * Initialize the receive DMA control and status register
4430 NXGE_DEBUG_MSG((nxgep, RX_CTL, "==> nxge_rxdma_stop_channel: control "
4435 " control register failed (0x%08x channel %d",
4441 "==> nxge_rxdma_stop_channel: control done"));