Lines Matching defs:rdc
39 #define NXGE_ACTUAL_RDC(nxgep, rdc) \
40 (rdc + nxgep->pt_config.hw_config.start_rdc)
248 int rdc;
258 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
259 if ((1 << rdc) & set->owned.map) {
260 nxge_grp_dc_remove(nxgep, VP_BOUND_RX, rdc);
308 int rdc;
330 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
331 if ((1 << rdc) & set->owned.map) {
333 nxgep->rx_rbr_rings->rbr_rings[rdc];
335 (void) nxge_dump_rxdma_channel(nxgep, rdc);
411 * rdc The new default RDC.
428 uint8_t rdc)
446 RDC_MAP_IN(rdc_grp_p->map, rdc);
447 rdc_grp_p->def_rdc = rdc;
450 actual_rdc = NXGE_ACTUAL_RDC(nxgep, rdc);
464 nxge_rxdma_cfg_port_default_rdc(p_nxge_t nxgep, uint8_t port, uint8_t rdc)
475 actual_rdc = rdc; /* XXX Hack! */
603 rs = npi_rxdma_cfg_rdc_ring(handle, rbr_p->rdc,
606 rs = npi_rxdma_cfg_rdc_ring(handle, rbr_p->rdc,
1159 nxge_rxdma_regs_dump(p_nxge_t nxgep, int rdc)
1168 "==> nxge_rxdma_regs_dump: rdc channel %d", rdc));
1174 (void) npi_rxdma_rdc_rbr_head_get(handle, rdc, &hd_addr);
1184 (void) npi_rxdma_rdc_rbr_stat_get(handle, rdc, &rbr_stat);
1189 (void) npi_rxdma_rdc_rcr_tail_get(handle, rdc, &tail_addr);
1199 (void) npi_rxdma_rdc_rcr_qlen_get(handle, rdc, &qlen);
1203 "<== nxge_rxdma_regs_dump: rdc rdc %d", rdc));
1212 int rdc;
1236 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
1237 if ((1 << rdc) & set->owned.map) {
1239 nxgep->rx_rbr_rings->rbr_rings[rdc];
1245 "channel %d (enable)", rdc));
1247 (handle, rdc);
1251 "channel %d disable)", rdc));
1253 (handle, rdc);
1311 int rdc;
1328 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
1329 if ((1 << rdc) & set->owned.map) {
1331 nxgep->rx_rbr_rings->rbr_rings[rdc];
1333 nxge_rxdma_hw_stop(nxgep, rdc);
1337 rdc, ring));
1338 (void) nxge_rxdma_fix_channel(nxgep, rdc);
1423 nxge_channel_t rdc;
1441 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
1442 if ((1 << rdc) & set->owned.map) {
1444 nxgep->rx_rbr_rings->rbr_rings[rdc];
1446 if (channel == ring->rdc) {
1449 "channel %d ring $%p", rdc, ring));
1466 nxge_channel_t rdc;
1484 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
1485 if ((1 << rdc) & set->owned.map) {
1487 nxgep->rx_rcr_rings->rcr_rings[rdc];
1489 if (channel == ring->rdc) {
1492 "channel %d ring $%p", rdc, ring));
1656 rx_rbr_p->rdc, 1);
1660 rx_rbr_p->rdc, rx_rbr_p->rbr_wr_index));
1892 "==> nxge_rx_intr: rdc %d ldgp $%p ldvp $%p "
1934 "==> nxge_rx_intr: rdc %d ldgp $%p "
1982 "channel %d", rcr_p->rdc));
1988 channel = rcr_p->rdc;
2164 "channel %d", rcr_p->rdc));
2232 channel = rcr_p->rdc;
2761 "==> nxge_enable_poll: rdc %d ", ringp->rdc));
2765 "==> nxge_enable_poll: rdc %d NULL ldgp: no change",
2766 ringp->rdc));
2775 "==> nxge_enable_poll: rdc %d set poll flag to 1",
2776 ringp->rdc));
2803 "==> nxge_disable_poll: rdc %d poll_flag %d", ringp->rdc));
2818 channel = ringp->rdc;
2843 "==> nxge_disable_poll: no ldgp rdc %d "
2844 "(still set poll to 0", ringp->rdc));
2848 "==> nxge_disable_poll: rdc %d ldgp $%p (enable intr)",
2849 ringp->rdc, ldgp));
2897 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, rcr_p->rdc, &cs.value);
2900 "==> nxge_rx_poll: calling nxge_rx_pkts: rdc %d poll_flag %d",
2901 rcr_p->rdc, rcr_p->poll_flag));
2913 "<== nxge_rx_poll: rdc %d mblk $%p", rcr_p->rdc, mblk));
3583 rcrp->rdc = dma_channel;
3744 rcr_p->rdc));
3807 rbrp->rdc = channel;
4003 rbr_p->rdc));
4023 rbr_p->rdc, num_chunks,
4736 int rdc;
4750 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
4751 if ((1 << rdc) & set->owned.map) {
4752 rcrp = nxgep->rx_rcr_rings->rcr_rings[rdc];
4756 rdc) != NXGE_OK) {
4759 "channel %d", rdc));