Lines Matching refs:portn
259 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
261 if (((nxgep->nxge_hw_p->niu_type >> (NXGE_PORT_TYPE_SHIFT * portn))
283 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
323 if (portn > 1) {
327 if (nxge_hswap_phy_present(nxgep, portn))
574 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
581 portn));
589 nxgep->xcvr_addr = portn;
598 if (nxgep->nxge_hw_p->xcvr_addr[portn]) {
600 nxgep->nxge_hw_p->xcvr_addr[portn];
609 nxgep->xcvr_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
615 nxgep->xcvr_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
648 (NXGE_PORT_TYPE_SHIFT * portn);
709 nxgep->xcvr_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
722 switch (portn) {
755 nxgep->xcvr_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
762 nxgep->xcvr_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
770 nxgep->xcvr_addr = portn;
779 "nxgep->nxge_hw_p->xcvr_addr[portn] = [%d] "
781 nxgep->nxge_hw_p->xcvr_addr[portn],
783 if (nxgep->nxge_hw_p->xcvr_addr[portn]) {
785 nxgep->nxge_hw_p->xcvr_addr[portn];
899 uint8_t portn;
901 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
903 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_mac_init: port<%d>", portn));
905 nxgep->mac.portnum = portn;
908 if ((portn == BMAC_PORT_0) || (portn == BMAC_PORT_1))
957 ((portn == 0) || (portn == 1))) {
966 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "<== nxge_mac_init: port<%d>", portn));
971 "nxge_mac_init: failed to initialize MAC port<%d>", portn));
983 uint8_t portn;
985 portn = nxgep->mac.portnum;
987 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_link_init: port<%d>", portn));
1015 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "<== nxge_link_init: port<%d>", portn));
1021 "failed to initialize Ethernet link on port<%d>", portn));
1034 uint8_t portn;
1041 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
1043 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_xif_init: port<%d>", portn));
1054 ((portn == 0) || (portn == 1))) {
1099 rs = npi_xmac_xif_config(handle, INIT, portn, xif_cfg);
1111 SET_MAC_ATTR1(handle, ap, portn, MAC_PORT_MODE,
1129 portn, portmode, statsp->mac_stats.link_speed));
1131 SET_MAC_ATTR1(handle, ap, portn, MAC_PORT_MODE,
1134 SET_MAC_ATTR1(handle, ap, portn, MAC_PORT_MODE,
1142 " for port<%d>", portmode, portn));
1166 rs = npi_bmac_xif_config(handle, INIT, portn, xif_cfg);
1171 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "<== nxge_xif_init: port<%d>", portn));
1175 "nxge_xif_init: Failed to initialize XIF port<%d>", portn));
1189 uint8_t portn;
1199 portn = nxgep->mac.portnum;
1202 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_pcs_init: port<%d>", portn));
1210 if ((rs = npi_mac_pcs_reset(handle, portn))
1216 if ((rs = npi_mac_pcs_reset(handle, portn))
1225 PCS_REG_WR(handle, portn, PCS_CONFIG_REG, pcs_cfg.value);
1226 PCS_REG_WR(handle, portn, PCS_DATAPATH_MODE_REG, 0);
1230 portn, pcs_cfg.value));
1240 PCS_REG_WR(handle, portn, PCS_MII_CTRL_REG,
1249 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
1251 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
1253 if ((rs = npi_xmac_xpcs_reset(handle, portn)) != NPI_SUCCESS)
1257 if ((rs = npi_xmac_xpcs_read(handle, portn,
1266 if ((rs = npi_xmac_xpcs_write(handle, portn,
1271 if ((rs = npi_xmac_xpcs_write(handle, portn,
1275 if ((rs = npi_xmac_xpcs_read(handle, portn,
1278 if ((rs = npi_xmac_xpcs_read(handle, portn,
1285 "==> nxge_pcs_init: (1G) copper port<%d>", portn));
1286 if (portn < 4) {
1287 PCS_REG_WR(handle, portn, PCS_DATAPATH_MODE_REG,
1290 if ((rs = npi_mac_pcs_reset(handle, portn)) != NPI_SUCCESS)
1297 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "<== nxge_pcs_init: port<%d>", portn));
1301 "nxge_pcs_init: Failed to initialize PCS port<%d>", portn));
1312 uint8_t portn;
1318 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
1321 portn));
1329 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
1353 portn));
1357 "enable pause", portn));
1371 "disable pause", portn));
1375 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
1378 BMAC_REG_RD(handle, portn, MAC_CTRL_CONFIG_REG, &val);
1416 BMAC_REG_WR(handle, portn, MAC_CTRL_CONFIG_REG, val);
1420 portn));
1432 uint8_t portn;
1437 portn = nxgep->mac.portnum;
1439 "==> nxge_serdes_init port<%d>", portn));
1451 portn));
1458 portn));
1468 uint8_t portn;
1482 portn = nxgep->mac.portnum;
1485 portn));
1488 "==> nxge_n2_serdes_init port<%d>: KT-NIU", portn));
1540 if ((status = nxge_mdio_write(nxgep, portn,
1550 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1554 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1559 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1563 portn, pll_cfg_l.value, cfg.value));
1565 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1569 portn, pll_sts_l.value, cfg.value));
1586 if (portn == 0) {
1595 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1599 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1604 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1608 portn, pll_cfg_l.value, cfg.value));
1610 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1614 portn, pll_sts_l.value, cfg.value));
1624 portn, test_cfg.value));
1625 if ((status = nxge_mdio_write(nxgep, portn,
1641 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1645 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1651 portn, chan, tx_cfg_l.value));
1654 portn, chan, tx_cfg_h.value));
1659 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1663 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1669 portn, chan, rx_cfg_l.value));
1673 portn, chan, rx_cfg_h.value));
1677 portn));
1683 portn));
1694 uint8_t portn;
1710 portn = nxgep->mac.portnum;
1713 "==> nxge_n2_kt_serdes_init port<%d>", portn));
1759 portn, tx_cfg_l.value));
1770 portn, tx_cfg_h.value));
1783 portn, rx_cfg_l.value));
1794 portn, rx_cfg_h.value));
1806 portn, pll_cfg_l.value));
1808 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1813 portn, pll_cfg_l.value));
1823 "loopback 0x%x", portn, tx_cfg_h.value));
1826 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1831 portn, pll_cfg_l.value, cfg.value));
1833 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1837 portn, cfg.value));
1850 portn, tx_cfg_l.value));
1857 portn, tx_cfg_h.value));
1868 portn, rx_cfg_l.value));
1875 portn, rx_cfg_h.value));
1883 portn, pll_cfg_l.value));
1885 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1892 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1896 portn, pll_cfg_l.value, cfg.value));
1898 nxge_mdio_read(nxgep, portn, ESR_N2_DEV_ADDR,
1902 portn, cfg.value));
1911 "loopback 0x%x", portn, test_cfg.value));
1912 if ((status = nxge_mdio_write(nxgep, portn,
1923 portn, nxgep->mac.portmode));
1929 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1939 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1943 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1949 "chan %d tx_cfg_l 0x%x", portn, chan, tx_cfg_l.value));
1953 "chan %d tx_cfg_h 0x%x", portn, chan, tx_cfg_h.value));
1959 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1964 if ((status = nxge_mdio_write(nxgep, portn, ESR_N2_DEV_ADDR,
1971 "chan %d rx_cfg_l 0x%x", portn, chan, rx_cfg_l.value));
1975 "chan %d rx_cfg_h 0x%x", portn, chan, rx_cfg_h.value));
1978 if (portn == 0) {
2004 "Serdes/signal for port<%d> not ready", portn));
2007 } else if (portn == 1) {
2033 "Serdes/signal for port<%d> not ready", portn));
2040 "<== nxge_n2_kt_serdes_init port<%d>", portn));
2046 portn));
2057 uint8_t portn;
2068 portn = nxgep->mac.portnum;
2070 if ((portn != 0) && (portn != 1))
2074 "==> nxge_neptune_10G_serdes_init port<%d>", portn));
2076 switch (portn) {
2153 if ((status = nxge_mdio_read(nxgep, portn,
2157 if ((status = nxge_mdio_read(nxgep, portn,
2161 if ((status = nxge_mdio_read(nxgep, portn,
2165 if ((status = nxge_mdio_read(nxgep, portn,
2176 if ((status = nxge_mdio_write(nxgep, portn,
2180 if ((status = nxge_mdio_write(nxgep, portn,
2184 if ((status = nxge_mdio_write(nxgep, portn,
2188 if ((status = nxge_mdio_write(nxgep, portn,
2195 if ((status = nxge_mdio_write(nxgep, portn,
2200 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2208 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2214 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2219 if ((status = nxge_mdio_read(nxgep, portn,
2223 if ((status = nxge_mdio_read(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2230 portn, val16l, val16h));
2233 if (portn == 0) {
2259 "Serdes/signal for port<%d> not ready", portn));
2262 } else if (portn == 1) {
2288 "Serdes/signal for port<%d> not ready", portn));
2295 "<== nxge_neptune_10G_serdes_init port<%d>", portn));
2301 "Failed to initialize Neptune serdes for port<%d>", portn));
2312 uint8_t portn;
2323 portn = nxgep->mac.portnum;
2326 "==> nxge_1G_serdes_init port<%d>", portn));
2330 switch (portn) {
2394 if ((status = nxge_mdio_read(nxgep, portn,
2399 if ((status = nxge_mdio_read(nxgep, portn,
2404 if ((status = nxge_mdio_read(nxgep, portn,
2409 if ((status = nxge_mdio_read(nxgep, portn,
2422 if ((status = nxge_mdio_write(nxgep, portn,
2427 if ((status = nxge_mdio_write(nxgep, portn,
2432 if ((status = nxge_mdio_write(nxgep, portn,
2437 if ((status = nxge_mdio_write(nxgep, portn,
2444 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2448 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2452 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2456 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2462 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2467 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2476 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2483 if ((status = nxge_mdio_write(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2489 if ((status = nxge_mdio_read(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2493 if ((status = nxge_mdio_read(nxgep, portn, ESR_NEPTUNE_DEV_ADDR,
2500 "(val16l 0x%x val16h 0x%x)", portn, val16l, val16h));
2509 "val 0x%x", portn, val));
2510 if (portn == 0) {
2521 "Serdes/signal for port<%d> not ready", portn));
2524 } else if (portn == 1) {
2535 "Serdes/signal for port<%d> not ready", portn));
2543 "<== nxge_1G_serdes_init port<%d>", portn));
2549 portn));
2583 uint8_t portn;
2595 portn = nxgep->mac.portnum;
2599 portn));
2623 "failed to reset Transceiver on port<%d>", portn));
2723 "BCM8704 port<%d> Dev 1 Reg 0xA = 0x%x\n", portn, val));
2728 "BCM8704 port<%d> Dev 3 Reg 0x20 = 0x%x\n", portn, val));
2733 "BCM8704 port<%d> Dev 4 Reg 0x18 = 0x%x\n", portn, val));
2762 " cable on port<%d>\n", portn));
2766 " on port<%d>\n", portn));
2772 portn));
2794 uint8_t portn = nxgep->mac.portnum;
2798 portn));
2822 "failed to reset Transceiver on port<%d>", portn));
2867 portn));
3596 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
3599 uint8_t xcvr_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
3614 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
3615 uint8_t xcvr_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
3779 uint8_t portn = nxgep->mac.portnum;
3782 portn));
3837 portn));
3912 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
4058 phy_port_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
4095 uint8_t portn;
4100 portn = nxgep->mac.portnum;
4102 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_xcvr_init: port<%d>", portn));
4137 portn));
4143 portn));
4172 uint8_t portn;
4178 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
4184 portn));
4195 portn));
4197 SET_MAC_ATTR2(handle, ap, portn,
4206 if ((rs = npi_xmac_tx_iconfig(handle, INIT, portn,
4215 SET_MAC_ATTR1(handle, ap, portn, XMAC_10G_PORT_IPG,
4221 SET_MAC_ATTR1(handle, ap, portn, XMAC_PORT_IPG,
4227 if ((rs = npi_xmac_tx_config(handle, INIT, portn,
4235 if ((rs = npi_xmac_zap_tx_counters(handle, portn))
4240 if ((rs = npi_bmac_tx_iconfig(handle, INIT, portn,
4245 SET_MAC_ATTR1(handle, ap, portn, BMAC_PORT_CTRL_TYPE, 0x8808,
4251 SET_MAC_ATTR1(handle, ap, portn, BMAC_PORT_PA_SIZE, 0x7, rs);
4256 if ((rs = npi_bmac_tx_config(handle, INIT, portn,
4263 portn));
4268 "nxge_tx_mac_init: failed to initialize port<%d> TXMAC", portn));
4279 uint8_t portn;
4283 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
4298 if ((rs = npi_mac_hashtab_entry(handle, OP_SET, portn, i,
4314 uint8_t portn;
4322 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
4325 portn));
4333 SET_MAC_ATTR3(handle, ap, portn, MAC_PORT_ADDR,
4337 SET_MAC_ATTR3(handle, ap, portn, MAC_PORT_ADDR_FILTER, 0, 0, 0, rs);
4340 SET_MAC_ATTR2(handle, ap, portn, MAC_PORT_ADDR_FILTER_MASK, 0, 0, rs);
4349 if ((rs = npi_xmac_rx_iconfig(handle, INIT, portn,
4368 portn, xconfig)) != NPI_SUCCESS)
4376 if ((rs = npi_xmac_zap_rx_counters(handle, portn))
4380 if (npi_bmac_rx_iconfig(nxgep->npi_handle, INIT, portn,
4398 portn, bconfig)) != NPI_SUCCESS)
4406 portn, 0)) != NPI_SUCCESS)
4411 portn));
4417 "nxge_rx_mac_init: Failed to Initialize port<%d> RxMAC", portn));
4508 uint8_t portn;
4517 portn = nxgep->mac.portnum;
4520 portn));
4526 if ((rs = npi_xmac_rx_config(handle, ENABLE, portn,
4530 if ((rs = npi_bmac_rx_config(handle, ENABLE, portn,
4536 "<== nxge_rx_mac_enable: port<%d>", portn));
4541 "nxgep_rx_mac_enable: Failed to enable port<%d> RxMAC", portn));
4555 uint8_t portn;
4563 portn = nxgep->mac.portnum;
4566 portn));
4569 if ((rs = npi_xmac_rx_config(handle, DISABLE, portn,
4573 if ((rs = npi_bmac_rx_config(handle, DISABLE, portn,
4579 portn));
4583 "nxgep_rx_mac_disable: Failed to disable port<%d> RxMAC", portn));
4594 uint8_t portn;
4598 portn = nxgep->mac.portnum;
4601 portn));
4604 if ((rs = npi_xmac_reset(handle, portn, XTX_MAC_RESET_ALL))
4608 if ((rs = npi_bmac_reset(handle, portn, TX_MAC_RESET))
4614 portn));
4619 "nxge_tx_mac_reset: Failed to Reset TxMAC port<%d>", portn));
4630 uint8_t portn;
4634 portn = nxgep->mac.portnum;
4637 portn));
4640 if ((rs = npi_xmac_reset(handle, portn, XRX_MAC_RESET_ALL))
4644 if ((rs = npi_bmac_reset(handle, portn, RX_MAC_RESET))
4650 portn));
4655 "nxge_rx_mac_reset: Failed to Reset RxMAC port<%d>", portn));
4665 uint8_t portn = nxgep->mac.portnum;
4667 rs = npi_xmac_xpcs_link_intr_enable(nxgep->npi_handle, portn);
4681 uint8_t portn = nxgep->mac.portnum;
4683 rs = npi_xmac_xpcs_link_intr_disable(nxgep->npi_handle, portn);
4697 uint8_t portn = nxgep->mac.portnum;
4699 rs = npi_mac_pcs_link_intr_enable(nxgep->npi_handle, portn);
4712 uint8_t portn = nxgep->mac.portnum;
4714 rs = npi_mac_pcs_link_intr_disable(nxgep->npi_handle, portn);
4728 uint8_t portn = nxgep->mac.portnum;
4730 rs = npi_mac_mif_link_intr_enable(nxgep->npi_handle, portn,
4745 uint8_t portn = nxgep->mac.portnum;
4747 rs = npi_mac_mif_link_intr_disable(nxgep->npi_handle, portn);
4760 uint8_t portn;
4763 portn = nxgep->mac.portnum;
4765 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_link_intr: port<%d>", portn));
4776 NXGE_DEBUG_MSG((nxgep, MAC_CTL, "<== nxge_link_intr: port<%d>", portn));
4781 "nxge_link_intr: Failed to set port<%d> mif intr mode", portn));
5827 nxge_pcs_check(p_nxge_t nxgep, uint8_t portn, nxge_link_state_t *link_up)
5837 (void) npi_mac_get_link_status(nxgep->npi_handle, portn, &linkup);
6046 uint8_t portn;
6055 portn = nxgep->mac.portnum;
6058 portn));
6084 portn, bmsr_data.value, nxgep->bmsr.value));
6136 portn, nxgep->bmsr.value, bmsr_data.value));
6144 portn, bmsr_data.value, bmsr_ints.value));
6160 "==> nxge_check_mii_link port<%d> (SERDES)", portn));
6161 nxge_pcs_check(nxgep, portn, &link_up);
6175 portn));
6183 "nxge_check_mii_link: Failed to check link port<%d>", portn));
6191 uint8_t portn;
6203 portn = nxgep->mac.portnum;
6208 portn));
6218 if (nxge_hswap_phy_present(nxgep, portn))
6333 portn, val, link_up));
6379 portn));
6387 portn));
6790 uint8_t phy_port_addr, portn;
6795 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
6796 phy_port_addr = nxgep->nxge_hw_p->xcvr_addr[portn];
6887 uint8_t portn;
6916 uint8_t portn;
6934 portn = nxgep->mac.portnum;
6937 "==> nxge_mac_intr: reading mac stats: port<%d>", portn));
6940 rs = npi_xmac_tx_get_istatus(handle, portn,
6947 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
6959 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
6964 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
6977 rs = npi_xmac_rx_get_istatus(handle, portn,
6986 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
7065 rs = npi_xmac_ctl_get_istatus(handle, portn,
7078 rs = npi_bmac_tx_get_istatus(handle, portn,
7085 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
7090 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
7103 rs = npi_bmac_rx_get_istatus(handle, portn,
7118 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
7124 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
7130 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
7140 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL,
7144 rs = npi_bmac_ctl_get_istatus(handle, portn,
7498 nxge_hswap_phy_present(p_nxge_t nxgep, uint8_t portn)
7508 if (portn == 1) {
7515 if (nxge_is_phy_present(nxgep, GOA_CLAUSE45_PORT_ADDR_BASE + portn,
7517 nxgep->xcvr_addr = GOA_CLAUSE45_PORT_ADDR_BASE + portn;
7524 switch (portn) {
8472 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
8486 switch (portn) {
8590 uint8_t portn;
8596 portn = NXGE_GET_PORT_NUM(nxgep->function_num);
8602 portn,
8606 SET_MAC_ATTR2(handle, ap, portn,
8614 "max/min frame size port %d", portn));
8620 "<== nxge_mac_set_framesize: port<%d>", portn));
8676 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num);
8684 phy_port_addr = nxgep->nxge_hw_p->xcvr_addr[portn];