Lines Matching refs:dc

321 	nxge_hio_dc_t	*dc;	/* The relevant DMA channel data structure. */
340 if ((dc = nxge_grp_dc_find(nxge, type, channel)) == 0) {
350 vector = dc->ldg.vector;
393 dc->interrupting = B_TRUE;
422 nxge_hio_dc_t *dc; /* The relevant DMA channel data structure. */
440 if ((dc = nxge_grp_dc_find(nxge, type, channel)) == 0) {
447 if (dc->interrupting == B_FALSE) {
458 vector = dc->ldg.vector;
490 dc->interrupting = B_FALSE;
766 * dc The TDC whose interrupt we're adding
777 nxge_hio_dc_t *dc)
793 hv_rv = (*tx->getinfo)(dc->cookie, dc->page, &dc->ldg.index,
794 &dc->ldg.ldsv);
803 (int)dc->ldg.index, (int)dc->ldg.ldsv));
806 hardware->tdc.start = dc->channel;
819 dc->ldg.vector = (dc->ldg.ldsv % 2) + HIO_INTR_BLOCK_SIZE;
832 * dc The RDC whose interrupt we're adding
843 nxge_hio_dc_t *dc)
859 hv_rv = (*rx->getinfo)(dc->cookie, dc->page, &dc->ldg.index,
860 &dc->ldg.ldsv);
869 (int)dc->ldg.index, (int)dc->ldg.ldsv));
872 hardware->start_rdc = dc->channel;
873 hardware->def_rdc = dc->channel;
884 dc->ldg.vector = (dc->ldg.ldsv % 2);
897 * dc The DMA channel whose interrupt we're adding
907 nxge_hio_ldsv_add(nxge_t *nxge, nxge_hio_dc_t *dc)
913 if (dc->type == VP_BOUND_TX) {
915 dc->channel));
916 if (nxge_hio_tdsv_add(nxge, dc) != 0)
920 dc->channel));
921 if (nxge_hio_rdsv_add(nxge, dc) != 0)
925 dc->ldg.map |= (1 << dc->ldg.ldsv);
945 group = &control->ldgp[dc->ldg.vector];
952 group->ldg = nxge->pt_config.hw_config.ldg[dc->ldg.vector];
953 group->vldg_index = (uint8_t)dc->ldg.index;
963 group->vector = dc->ldg.vector;
977 device = &control->ldvp[dc->ldg.ldsv];
980 device->ldv = dc->ldg.ldsv;
982 if (dc->type == VP_BOUND_TX) {
996 device->channel = dc->channel;
997 device->vdma_index = dc->page;