Lines Matching defs:ring
607 tx_ring_t *ring;
614 ring = nxge->tx_rings->rings[channel];
616 if (ring->hv_set) {
631 ring->hv_tx_buf_base_ioaddr_pp = (uint64_t)data->orig_ioaddr_pp;
632 ring->hv_tx_buf_ioaddr_size = (uint64_t)data->orig_alength;
636 ring->hv_tx_buf_base_ioaddr_pp,
637 ring->hv_tx_buf_ioaddr_size);
645 ring->hv_tx_buf_base_ioaddr_pp,
646 ring->hv_tx_buf_ioaddr_size));
659 channel, hv_rv, ring->hv_tx_buf_base_ioaddr_pp,
660 ring->hv_tx_buf_ioaddr_size, ra, size));
666 ring->hv_tx_cntl_base_ioaddr_pp = (uint64_t)control->orig_ioaddr_pp;
667 ring->hv_tx_cntl_ioaddr_size = (uint64_t)control->orig_alength;
671 ring->hv_tx_cntl_base_ioaddr_pp,
672 ring->hv_tx_cntl_ioaddr_size);
680 ring->hv_tx_cntl_base_ioaddr_pp,
681 ring->hv_tx_cntl_ioaddr_size));
694 channel, hv_rv, ring->hv_tx_cntl_base_ioaddr_pp,
695 ring->hv_tx_cntl_ioaddr_size, ra, size));
697 ring->hv_set = B_TRUE;
726 rx_rbr_ring_t *ring;
733 ring = nxge->rx_rbr_rings->rbr_rings[channel];
735 if (ring->hv_set) {
749 ring->hv_rx_buf_base_ioaddr_pp = (uint64_t)data->orig_ioaddr_pp;
750 ring->hv_rx_buf_ioaddr_size = (uint64_t)data->orig_alength;
754 ring->hv_rx_buf_base_ioaddr_pp,
755 ring->hv_rx_buf_ioaddr_size);
763 ring->hv_rx_buf_base_ioaddr_pp,
764 ring->hv_rx_buf_ioaddr_size));
777 channel, hv_rv, ring->hv_rx_buf_base_ioaddr_pp,
778 ring->hv_rx_buf_ioaddr_size, ra, size));
784 ring->hv_rx_cntl_base_ioaddr_pp = (uint64_t)control->orig_ioaddr_pp;
785 ring->hv_rx_cntl_ioaddr_size = (uint64_t)control->orig_alength;
789 ring->hv_rx_cntl_base_ioaddr_pp,
790 ring->hv_rx_cntl_ioaddr_size);
798 ring->hv_rx_cntl_base_ioaddr_pp,
799 ring->hv_rx_cntl_ioaddr_size));
812 channel, hv_rv, ring->hv_rx_cntl_base_ioaddr_pp,
813 ring->hv_rx_cntl_ioaddr_size, ra, size));
815 ring->hv_set = B_TRUE;