Lines Matching defs:ldg
175 int num_regs, i, ldg;
181 for (ldg = 0; ldg < NXGE_INT_MAX_LDGS; ldg++) {
184 offset = pio_ldsv_offset[i] + 8192 * ldg;
189 ldg, offset,
248 int num_regs, i, ldg;
254 for (ldg = 0; ldg < NXGE_INT_MAX_LDGS; ldg++) {
257 offset = fzc_pio_sid_offset[i] + 8 * ldg;
263 ldg, offset,
838 * ldg - logical device group number (0 - 63)
847 npi_fzc_ldg_num_set(npi_handle_t handle, uint8_t ld, uint8_t ldg)
859 ASSERT(LDG_VALID(ldg));
860 if (!LDG_VALID(ldg)) {
863 " ldg <0x%x>", ldg));
868 gnum.bits.ldw.num = ldg;
916 * ldg - logical device group (0 - 63)
925 npi_ldsv_ldfs_get(npi_handle_t handle, uint8_t ldg, uint64_t *vector0_p,
930 if ((status = npi_ldsv_get(handle, ldg, VECTOR0, vector0_p))) {
933 if ((status = npi_ldsv_get(handle, ldg, VECTOR1, vector1_p))) {
936 if ((status = npi_ldsv_get(handle, ldg, VECTOR2, vector2_p))) {
948 * ldg - logical device group (0 - 63)
959 npi_ldsv_get(npi_handle_t handle, uint8_t ldg, ldsv_type_t vector,
964 ASSERT(LDG_VALID(ldg));
965 if (!LDG_VALID(ldg)) {
969 " ldg <0x%x>", ldg));
970 return (NPI_FAILURE | NPI_VIR_LDG_INVALID(ldg));
975 offset = LDSV0_REG + LDSV_OFFSET(ldg);
979 offset = LDSV1_REG + LDSV_OFFSET(ldg);
983 offset = LDSV2_REG + LDSV_OFFSET(ldg);
1004 * ldg - logical device group (0 - 63)
1016 npi_ldsv_ld_get(npi_handle_t handle, uint8_t ldg, uint8_t ld,
1022 ASSERT(LDG_VALID(ldg));
1023 if (!LDG_VALID(ldg)) {
1027 " ldg <0x%x>", ldg));
1028 return (NPI_FAILURE | NPI_VIR_LDG_INVALID(ldg));
1046 offset = LDSV0_REG + LDSV_OFFSET(ldg);
1050 offset = LDSV1_REG + LDSV_OFFSET(ldg);
1054 offset = LDSV2_REG + LDSV_OFFSET(ldg);
1083 * ldg - logical device group (0 - 63)
1093 npi_ldsv_ld_ldf0_get(npi_handle_t handle, uint8_t ldg, uint8_t ld,
1102 return (npi_ldsv_ld_get(handle, ldg, ld, vector, LDF0, flag_p));
1110 * ldg - logical device group (0 - 63)
1120 npi_ldsv_ld_ldf1_get(npi_handle_t handle, uint8_t ldg, uint8_t ld,
1129 return (npi_ldsv_ld_get(handle, ldg, ld, vector, LDF1, flag_p));
1210 * ldg - logical device group (0 - 63)
1219 npi_intr_ldg_mgmt_set(npi_handle_t handle, uint8_t ldg, boolean_t arm,
1225 ASSERT((LDG_VALID(ldg)) && (LD_INTTIMER_VALID(timer)));
1226 if (!LDG_VALID(ldg)) {
1230 " ldg <0x%x>", ldg));
1231 return (NPI_FAILURE | NPI_VIR_LDG_INVALID(ldg));
1237 return (NPI_FAILURE | NPI_VIR_INTM_TM_INVALID(ldg));
1243 NXGE_REG_RD64(handle, LDGIMGN_REG + LDSV_OFFSET(ldg), &val);
1248 NXGE_REG_WR64(handle, LDGIMGN_REG + LDSV_OFFSET(ldg),
1252 " npi_intr_ldg_mgmt_set: ldg %d"
1254 ldg, LDGIMGN_REG + LDSV_OFFSET(ldg)));
1264 * ldg - logical device group (0 - 63)
1273 npi_intr_ldg_mgmt_timer_get(npi_handle_t handle, uint8_t ldg, uint8_t *timer_p)
1277 ASSERT(LDG_VALID(ldg));
1278 if (!LDG_VALID(ldg)) {
1281 " Invalid Input: ldg <0x%x>", ldg));
1282 return (NPI_FAILURE | NPI_VIR_LDG_INVALID(ldg));
1285 NXGE_REG_RD64(handle, LDGIMGN_REG + LDSV_OFFSET(ldg), &val);
1290 " npi_intr_ldg_mgmt_timer_get: ldg %d"
1292 ldg, LDGIMGN_REG + LDSV_OFFSET(ldg)));
1302 * ldg - logical device group (0 - 63)
1310 npi_intr_ldg_mgmt_arm(npi_handle_t handle, uint8_t ldg)
1314 ASSERT(LDG_VALID(ldg));
1315 if (!LDG_VALID(ldg)) {
1318 " Invalid Input: ldg <0x%x>",
1319 ldg));
1320 return (NPI_FAILURE | NPI_VIR_LDG_INVALID(ldg));
1323 NXGE_REG_RD64(handle, (LDGIMGN_REG + LDSV_OFFSET(ldg)), &mgm.value);
1326 NXGE_REG_WR64(handle, LDGIMGN_REG + LDSV_OFFSET(ldg),
1329 " npi_intr_ldg_mgmt_arm: ldg %d"
1331 ldg, LDGIMGN_REG + LDSV_OFFSET(ldg)));
1394 * ldg - logical group (0 - 63)
1407 ASSERT(LDG_VALID(sid.ldg));
1408 if (!LDG_VALID(sid.ldg)) {
1411 " Invalid Input: ldg <0x%x>",
1412 sid.ldg));
1413 return (NPI_FAILURE | NPI_VIR_LDG_INVALID(sid.ldg));
1447 " npi_fzc_sid_set: group %d 0x%llx", sid.ldg, sd.value));
1449 NXGE_REG_WR64(handle, SID_REG + LDG_SID_OFFSET(sid.ldg), sd.value);
1459 * ldg - logical group (0 - 63)
1472 ASSERT(LDG_VALID(sid_p->ldg));
1473 if (!LDG_VALID(sid_p->ldg)) {
1476 " Invalid Input: ldg <0x%x>",
1477 sid_p->ldg));
1478 return (NPI_FAILURE | NPI_VIR_LDG_INVALID(sid_p->ldg));
1480 NXGE_REG_RD64(handle, (SID_REG + LDG_SID_OFFSET(sid_p->ldg)),