Lines Matching refs:offset
47 * offset The offset into the DMA CSR (the register).
72 * offset += ((channel << 1) << DMA_CSR_SLL);
79 * offset = 0x640028
80 * offset &= 0xff = 0x28
81 * offset += ((3 << 1) << 9)
84 * offset += 0xc00 = 0xc28
93 * channel number by 512 bytes, and get the correct offset to
96 * is offset 512 bytes from the previous channel (count 16 step 512).
98 * offset += (channel << DMA_CSR_SLL); // channel<<9 = channel*512
105 * offset = 0x640028
106 * offset += (3 << 9)
108 * offset += 0x600 = 0x640628
124 uint64_t offset,
129 const char *name = nxge_tx2str((int)offset);
132 offset &= DMA_CSR_MASK;
133 offset += ((channel << 1) << DMA_CSR_SLL);
135 offset += (channel << DMA_CSR_SLL);
140 (uint64_t *)(handle.regp + (uint32_t)offset));
142 *value = ddi_get64(handle.regh, (uint64_t *)(handle.regp + offset));
147 name, (uint32_t)offset, *value);
152 rt_show_reg(0xbadbad, B_FALSE, (uint32_t)offset, *value);