Lines Matching defs:handle
44 * #define RXDMA_REG_WRITE64(handle, reg, channel, data) { \
45 * NXGE_REG_WR64(handle, (NXGE_RXDMA_OFFSET(reg, handle.is_vraddr,\
51 * #define NXGE_REG_WR64(handle, offset, val) { \
52 * NXGE_NPI_PIO_WRITE64(handle, (offset), (val)); \
53 * npi_rtrace_update(handle, B_TRUE, &npi_rtracebuf, (uint32_t)offset, \
57 * #define NXGE_REG_WR64(handle, offset, val) {\
58 * NXGE_NPI_PIO_WRITE64(handle, offset, (val));\
62 * #define NXGE_REG_WR64(handle, offset, val) {\
63 * NXGE_NPI_PIO_WRITE64(handle, (offset), (val));\
110 * #define RXDMA_REG_WRITE64(handle, reg, channel, data) { \
111 * NXGE_REG_WR64(handle, (NXGE_RXDMA_OFFSET(reg, handle.is_vraddr,\
114 * ddi_put64(handle.regh, (uint64_t*)(handle.regp + ((0x600000 + 0x00000) +
115 * (!handle.is_vraddr ?
129 * handle The NPI handle to use.
135 * If handle.regp is a virtual address (the address of a VR),
153 * RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel, value);
180 * RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel, value);
201 npi_handle_t handle,
209 if (handle.is_vraddr) {
217 ddi_put64(handle.regh,
218 (uint64_t *)(handle.regp + (uint32_t)offset), value);
220 ddi_put64(handle.regh,
221 (uint64_t *)(handle.regp + offset), value);
225 npi_trace_update(handle, B_TRUE, &npi_rtracebuf,