Lines Matching refs:portn
38 #define XMAC_WAIT_REG(handle, portn, reg, val) {\
42 XMAC_REG_RD(handle, portn, reg, &val);\
47 #define BMAC_WAIT_REG(handle, portn, reg, val) {\
51 BMAC_REG_RD(handle, portn, reg, &val);\
567 npi_mac_pcs_link_intr_enable(npi_handle_t handle, uint8_t portn)
571 ASSERT(IS_PORT_NUM_VALID(portn));
573 PCS_REG_RD(handle, portn, PCS_CONFIG_REG, &pcs_cfg.value);
575 PCS_REG_WR(handle, portn, PCS_CONFIG_REG, pcs_cfg.value);
581 npi_mac_pcs_link_intr_disable(npi_handle_t handle, uint8_t portn)
585 ASSERT(IS_PORT_NUM_VALID(portn));
587 PCS_REG_RD(handle, portn, PCS_CONFIG_REG, &pcs_cfg.val.lsw);
589 PCS_REG_WR(handle, portn, PCS_CONFIG_REG, pcs_cfg.val.lsw);
595 npi_xmac_xpcs_link_intr_enable(npi_handle_t handle, uint8_t portn)
599 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
601 XPCS_REG_RD(handle, portn, XPCS_MASK_1_REG, &xpcs_mask1.val.lsw);
603 XPCS_REG_WR(handle, portn, XPCS_MASK_1_REG, xpcs_mask1.val.lsw);
609 npi_xmac_xpcs_link_intr_disable(npi_handle_t handle, uint8_t portn)
613 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
615 XPCS_REG_RD(handle, portn, XPCS_MASK_1_REG, &xpcs_mask1.val.lsw);
617 XPCS_REG_WR(handle, portn, XPCS_MASK_1_REG, xpcs_mask1.val.lsw);
623 npi_mac_mif_link_intr_disable(npi_handle_t handle, uint8_t portn)
627 ASSERT(IS_PORT_NUM_VALID(portn));
631 mif_cfg.bits.w0.phy_addr = portn;
642 npi_mac_hashtab_entry(npi_handle_t handle, io_op_t op, uint8_t portn,
648 ASSERT(IS_PORT_NUM_VALID(portn));
656 return (NPI_FAILURE | NPI_MAC_HASHTAB_ENTRY_INVALID(portn));
661 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
662 XMAC_REG_WR(handle, portn,
665 BMAC_REG_WR(handle, portn,
669 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
670 XMAC_REG_RD(handle, portn,
673 BMAC_REG_RD(handle, portn,
683 npi_mac_hostinfo_entry(npi_handle_t handle, io_op_t op, uint8_t portn,
687 ASSERT(IS_PORT_NUM_VALID(portn));
689 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
697 NPI_MAC_HOSTINFO_ENTRY_INVALID(portn));
707 NPI_MAC_HOSTINFO_ENTRY_INVALID(portn));
712 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
713 XMAC_REG_WR(handle, portn,
717 BMAC_REG_WR(handle, portn,
722 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
723 XMAC_REG_RD(handle, portn,
727 BMAC_REG_RD(handle, portn,
737 npi_mac_altaddr_enable(npi_handle_t handle, uint8_t portn, uint8_t addrn)
741 ASSERT(IS_PORT_NUM_VALID(portn));
743 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
751 NPI_MAC_ALT_ADDR_ENTRY_INVALID(portn));
753 XMAC_REG_RD(handle, portn, XMAC_ADDR_CMPEN_REG, &val);
755 XMAC_REG_WR(handle, portn, XMAC_ADDR_CMPEN_REG, val);
764 NPI_MAC_ALT_ADDR_ENTRY_INVALID(portn));
766 BMAC_REG_RD(handle, portn, BMAC_ALTAD_CMPEN_REG, &val);
768 BMAC_REG_WR(handle, portn, BMAC_ALTAD_CMPEN_REG, val);
779 npi_mac_altaddr_disable(npi_handle_t handle, uint8_t portn, uint8_t addrn)
783 ASSERT(IS_PORT_NUM_VALID(portn));
785 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
793 NPI_MAC_ALT_ADDR_ENTRY_INVALID(portn));
795 XMAC_REG_RD(handle, portn, XMAC_ADDR_CMPEN_REG, &val);
797 XMAC_REG_WR(handle, portn, XMAC_ADDR_CMPEN_REG, val);
806 NPI_MAC_ALT_ADDR_ENTRY_INVALID(portn));
808 BMAC_REG_RD(handle, portn, BMAC_ALTAD_CMPEN_REG, &val);
810 BMAC_REG_WR(handle, portn, BMAC_ALTAD_CMPEN_REG, val);
817 npi_mac_altaddr_entry(npi_handle_t handle, io_op_t op, uint8_t portn,
822 ASSERT(IS_PORT_NUM_VALID(portn));
825 if ((portn == XMAC_PORT_0) || (portn == XMAC_PORT_1)) {
833 NPI_MAC_ALT_ADDR_ENTRY_INVALID(portn));
839 XMAC_REG_WR(handle, portn,
841 XMAC_REG_WR(handle, portn,
843 XMAC_REG_WR(handle, portn,
846 XMAC_REG_RD(handle, portn,
848 XMAC_REG_RD(handle, portn,
850 XMAC_REG_RD(handle, portn,
864 NPI_MAC_ALT_ADDR_ENTRY_INVALID(portn));
870 BMAC_REG_WR(handle, portn,
872 BMAC_REG_WR(handle, portn,
874 BMAC_REG_WR(handle, portn,
877 BMAC_REG_RD(handle, portn,
879 BMAC_REG_RD(handle, portn,
881 BMAC_REG_RD(handle, portn,
893 npi_mac_port_attr(npi_handle_t handle, io_op_t op, uint8_t portn,
899 ASSERT(IS_PORT_NUM_VALID(portn));
904 switch (portn) {
922 NPI_MAC_PORT_ATTR_INVALID(portn));
924 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG,
942 NPI_MAC_PORT_ATTR_INVALID(portn));
944 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG,
947 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG,
962 NPI_MAC_PORT_ATTR_INVALID(portn));
964 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
972 switch (portn) {
990 NPI_MAC_PORT_ATTR_INVALID(portn));
1004 NPI_MAC_PORT_ATTR_INVALID(portn));
1006 XMAC_REG_RD(handle, portn, XMAC_MIN_REG, &val);
1011 XMAC_REG_WR(handle, portn, XMAC_MIN_REG, val);
1012 XMAC_REG_WR(handle, portn, XMAC_MAX_REG,
1015 XMAC_REG_RD(handle, portn, XMAC_MIN_REG, &val);
1018 XMAC_REG_RD(handle, portn, XMAC_MAX_REG, &val);
1039 NPI_MAC_PORT_ATTR_INVALID(portn));
1052 NPI_MAC_PORT_ATTR_INVALID(portn));
1054 BMAC_REG_RD(handle, portn, BMAC_MAX_REG, &val);
1070 BMAC_REG_WR(handle, portn, BMAC_MAX_REG, val);
1071 BMAC_REG_WR(handle, portn, BMAC_MIN_REG,
1074 BMAC_REG_RD(handle, portn, BMAC_MIN_REG, &val);
1076 BMAC_REG_RD(handle, portn, BMAC_MAX_REG, &val);
1083 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1090 switch (portn) {
1096 " Invalid Input: portn <%d>",
1097 portn));
1098 return (NPI_FAILURE | NPI_MAC_PORT_ATTR_INVALID(portn));
1114 NPI_MAC_PORT_ATTR_INVALID(portn));
1116 BMAC_REG_RD(handle, portn, BMAC_MAX_REG, &val);
1119 BMAC_REG_WR(handle, portn, BMAC_MAX_REG, val);
1121 BMAC_REG_RD(handle, portn, BMAC_MAX_REG, &val);
1128 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1135 switch (portn) {
1141 " Invalid Input: portn <%d>",
1142 portn));
1143 return (NPI_FAILURE | NPI_MAC_PORT_ATTR_INVALID(portn));
1158 NPI_MAC_PORT_ATTR_INVALID(portn));
1160 BMAC_REG_RD(handle, portn, MAC_PA_SIZE_REG,
1164 BMAC_REG_WR(handle, portn, MAC_PA_SIZE_REG,
1167 BMAC_REG_RD(handle, portn, MAC_PA_SIZE_REG,
1174 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1181 switch (portn) {
1187 " Invalid Input: portn <%d>",
1188 portn));
1189 return (NPI_FAILURE | NPI_MAC_PORT_ATTR_INVALID(portn));
1204 NPI_MAC_PORT_ATTR_INVALID(portn));
1206 BMAC_REG_WR(handle, portn, MAC_CTRL_TYPE_REG,
1209 BMAC_REG_RD(handle, portn, MAC_CTRL_TYPE_REG,
1216 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1225 switch (portn) {
1244 NPI_MAC_PORT_ATTR_INVALID(portn));
1247 XMAC_REG_RD(handle, portn, XMAC_IPG_REG, &val);
1266 NPI_MAC_PORT_ATTR_INVALID(portn));
1268 XMAC_REG_WR(handle, portn, XMAC_IPG_REG, val);
1270 XMAC_REG_RD(handle, portn, XMAC_IPG_REG, &val);
1285 NPI_MAC_PORT_ATTR_INVALID(portn));
1293 " Invalid Input: portn <%d>",
1294 portn));
1296 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1304 switch (portn) {
1327 NPI_MAC_PORT_ATTR_INVALID(portn));
1330 XMAC_REG_RD(handle, portn, XMAC_IPG_REG, &val);
1357 NPI_MAC_PORT_ATTR_INVALID(portn));
1359 XMAC_REG_WR(handle, portn, XMAC_IPG_REG, val);
1361 XMAC_REG_RD(handle, portn, XMAC_IPG_REG, &val);
1382 NPI_MAC_PORT_ATTR_INVALID(portn));
1391 " Invalid Input: portn <%d>",
1392 portn));
1394 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1404 switch (portn) {
1421 NPI_MAC_PORT_ATTR_INVALID(portn));
1432 NPI_MAC_PORT_ATTR_INVALID(portn));
1445 NPI_MAC_PORT_ATTR_INVALID(portn));
1447 XMAC_REG_WR(handle, portn, XMAC_ADDR0_REG,
1449 XMAC_REG_WR(handle, portn, XMAC_ADDR1_REG,
1451 XMAC_REG_WR(handle, portn, XMAC_ADDR2_REG,
1454 XMAC_REG_RD(handle, portn, XMAC_ADDR0_REG,
1456 XMAC_REG_RD(handle, portn, XMAC_ADDR1_REG,
1458 XMAC_REG_RD(handle, portn, XMAC_ADDR2_REG,
1481 NPI_MAC_PORT_ATTR_INVALID(portn));
1493 NPI_MAC_PORT_ATTR_INVALID(portn));
1505 NPI_MAC_PORT_ATTR_INVALID(portn));
1507 BMAC_REG_WR(handle, portn, BMAC_ADDR0_REG,
1509 BMAC_REG_WR(handle, portn, BMAC_ADDR1_REG,
1511 BMAC_REG_WR(handle, portn, BMAC_ADDR2_REG,
1514 BMAC_REG_RD(handle, portn, BMAC_ADDR0_REG,
1516 BMAC_REG_RD(handle, portn, BMAC_ADDR1_REG,
1518 BMAC_REG_RD(handle, portn, BMAC_ADDR2_REG,
1526 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1536 switch (portn) {
1553 NPI_MAC_PORT_ATTR_INVALID(portn));
1565 NPI_MAC_PORT_ATTR_INVALID(portn));
1577 NPI_MAC_PORT_ATTR_INVALID(portn));
1579 XMAC_REG_WR(handle, portn,
1581 XMAC_REG_WR(handle, portn,
1583 XMAC_REG_WR(handle, portn,
1586 XMAC_REG_RD(handle, portn,
1588 XMAC_REG_RD(handle, portn,
1590 XMAC_REG_RD(handle, portn,
1612 NPI_MAC_PORT_ATTR_INVALID(portn));
1624 NPI_MAC_PORT_ATTR_INVALID(portn));
1636 NPI_MAC_PORT_ATTR_INVALID(portn));
1638 BMAC_REG_WR(handle, portn, MAC_ADDR_FILT0_REG,
1640 BMAC_REG_WR(handle, portn, MAC_ADDR_FILT1_REG,
1642 BMAC_REG_WR(handle, portn, MAC_ADDR_FILT2_REG,
1645 BMAC_REG_RD(handle, portn, MAC_ADDR_FILT0_REG,
1647 BMAC_REG_RD(handle, portn, MAC_ADDR_FILT1_REG,
1649 BMAC_REG_RD(handle, portn, MAC_ADDR_FILT2_REG,
1657 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1666 switch (portn) {
1682 NPI_MAC_PORT_ATTR_INVALID(portn));
1694 NPI_MAC_PORT_ATTR_INVALID(portn));
1696 XMAC_REG_WR(handle, portn,
1698 XMAC_REG_WR(handle, portn,
1701 XMAC_REG_RD(handle, portn,
1703 XMAC_REG_RD(handle, portn,
1714 BMAC_REG_WR(handle, portn,
1716 BMAC_REG_WR(handle, portn,
1719 BMAC_REG_RD(handle, portn,
1721 BMAC_REG_RD(handle, portn,
1728 return (NPI_FAILURE | NPI_MAC_PORT_INVALID(portn));
1738 return (NPI_FAILURE | NPI_MAC_PORT_ATTR_INVALID(portn));
1745 npi_xmac_reset(npi_handle_t handle, uint8_t portn, npi_mac_reset_t mode)
1750 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
1754 XMAC_REG_WR(handle, portn, XTXMAC_SW_RST_REG, XTXMAC_REG_RST);
1755 XMAC_WAIT_REG(handle, portn, XTXMAC_SW_RST_REG, val);
1759 XMAC_REG_WR(handle, portn, XRXMAC_SW_RST_REG, XRXMAC_REG_RST);
1760 XMAC_WAIT_REG(handle, portn, XRXMAC_SW_RST_REG, val);
1763 XMAC_REG_WR(handle, portn, XTXMAC_SW_RST_REG, XTXMAC_SOFT_RST);
1764 XMAC_WAIT_REG(handle, portn, XTXMAC_SW_RST_REG, val);
1768 XMAC_REG_WR(handle, portn, XRXMAC_SW_RST_REG, XRXMAC_SOFT_RST);
1769 XMAC_WAIT_REG(handle, portn, XRXMAC_SW_RST_REG, val);
1772 XMAC_REG_WR(handle, portn, XTXMAC_SW_RST_REG,
1774 XMAC_WAIT_REG(handle, portn, XTXMAC_SW_RST_REG, val);
1778 XMAC_REG_WR(handle, portn, XRXMAC_SW_RST_REG,
1780 XMAC_WAIT_REG(handle, portn, XRXMAC_SW_RST_REG, val);
1787 return (NPI_FAILURE | NPI_MAC_RESET_MODE_INVALID(portn));
1797 return (NPI_FAILURE | NPI_TXMAC_RESET_FAILED(portn));
1799 return (NPI_FAILURE | NPI_RXMAC_RESET_FAILED(portn));
1806 npi_xmac_xif_config(npi_handle_t handle, config_op_t op, uint8_t portn,
1811 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
1822 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
1825 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
1848 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
1851 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
1870 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
1880 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
1882 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
1927 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
1934 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
1941 npi_xmac_tx_config(npi_handle_t handle, config_op_t op, uint8_t portn,
1946 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
1957 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
1960 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
1969 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
1971 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
1980 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
1990 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
1992 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
2010 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
2017 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2024 npi_xmac_rx_config(npi_handle_t handle, config_op_t op, uint8_t portn,
2029 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2040 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2043 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
2068 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
2070 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
2095 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
2105 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2107 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
2157 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
2163 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2170 npi_xmac_tx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn,
2175 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2186 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2188 XMAC_REG_RD(handle, portn, XTXMAC_STAT_MSK_REG, &val);
2193 XMAC_REG_WR(handle, portn, XTXMAC_STAT_MSK_REG, val);
2203 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2205 XMAC_REG_WR(handle, portn, XTXMAC_STAT_MSK_REG, ~iconfig);
2213 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2220 npi_xmac_rx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn,
2225 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2236 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2238 XMAC_REG_RD(handle, portn, XRXMAC_STAT_MSK_REG, &val);
2243 XMAC_REG_WR(handle, portn, XRXMAC_STAT_MSK_REG, val);
2253 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2255 XMAC_REG_WR(handle, portn, XRXMAC_STAT_MSK_REG, ~iconfig);
2263 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2270 npi_xmac_ctl_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn,
2275 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2287 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2289 XMAC_REG_RD(handle, portn, XMAC_C_S_MSK_REG, &val);
2294 XMAC_REG_WR(handle, portn, XMAC_C_S_MSK_REG, val);
2304 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2306 XMAC_REG_WR(handle, portn, XMAC_C_S_MSK_REG, ~iconfig);
2314 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2321 npi_xmac_tx_get_istatus(npi_handle_t handle, uint8_t portn,
2326 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2328 XMAC_REG_RD(handle, portn, XTXMAC_STATUS_REG, &val);
2335 npi_xmac_rx_get_istatus(npi_handle_t handle, uint8_t portn,
2340 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2342 XMAC_REG_RD(handle, portn, XRXMAC_STATUS_REG, &val);
2349 npi_xmac_ctl_get_istatus(npi_handle_t handle, uint8_t portn,
2354 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2356 XMAC_REG_RD(handle, portn, XMAC_CTRL_STAT_REG, &val);
2363 npi_xmac_xpcs_reset(npi_handle_t handle, uint8_t portn)
2368 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2370 XPCS_REG_RD(handle, portn, XPCS_CTRL_1_REG, &val);
2372 XPCS_REG_WR(handle, portn, XPCS_CTRL_1_REG, val);
2376 XPCS_REG_RD(handle, portn, XPCS_CTRL_1_REG, &val);
2381 " npi_xmac_xpcs_reset portn <%d> failed", portn));
2389 npi_xmac_xpcs_enable(npi_handle_t handle, uint8_t portn)
2393 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2395 XPCS_REG_RD(handle, portn, XPCS_CFG_VENDOR_1_REG, &val);
2397 XPCS_REG_WR(handle, portn, XPCS_CFG_VENDOR_1_REG, val);
2403 npi_xmac_xpcs_disable(npi_handle_t handle, uint8_t portn)
2407 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2409 XPCS_REG_RD(handle, portn, XPCS_CFG_VENDOR_1_REG, &val);
2411 XPCS_REG_WR(handle, portn, XPCS_CFG_VENDOR_1_REG, val);
2417 npi_xmac_xpcs_read(npi_handle_t handle, uint8_t portn, uint8_t xpcs_reg,
2423 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2488 return (NPI_FAILURE | NPI_MAC_REG_INVALID(portn));
2490 XPCS_REG_RD(handle, portn, reg, &val);
2497 npi_xmac_xpcs_write(npi_handle_t handle, uint8_t portn, uint8_t xpcs_reg,
2503 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
2535 return (NPI_FAILURE | NPI_MAC_PCS_REG_INVALID(portn));
2539 XPCS_REG_WR(handle, portn, reg, val);
2545 npi_bmac_reset(npi_handle_t handle, uint8_t portn, npi_mac_reset_t mode)
2550 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
2554 BMAC_REG_WR(handle, portn, BTXMAC_SW_RST_REG, 0x1);
2555 BMAC_WAIT_REG(handle, portn, BTXMAC_SW_RST_REG, val);
2559 BMAC_REG_WR(handle, portn, BRXMAC_SW_RST_REG, 0x1);
2560 BMAC_WAIT_REG(handle, portn, BRXMAC_SW_RST_REG, val);
2567 return (NPI_FAILURE | NPI_MAC_RESET_MODE_INVALID(portn));
2576 return (NPI_FAILURE | NPI_TXMAC_RESET_FAILED(portn));
2578 return (NPI_FAILURE | NPI_RXMAC_RESET_FAILED(portn));
2585 npi_mac_pcs_reset(npi_handle_t handle, uint8_t portn)
2591 ASSERT(IS_PORT_NUM_VALID(portn));
2593 PCS_REG_RD(handle, portn, PCS_MII_CTRL_REG, &val);
2595 PCS_REG_WR(handle, portn, PCS_MII_CTRL_REG, val);
2598 PCS_REG_RD(handle, portn, PCS_MII_CTRL_REG, &val);
2603 " npi_bmac_pcs_reset portn <%d> failed", portn));
2610 npi_mac_get_link_status(npi_handle_t handle, uint8_t portn,
2615 ASSERT(IS_PORT_NUM_VALID(portn));
2617 PCS_REG_RD(handle, portn, PCS_MII_STATUS_REG, &val);
2629 npi_bmac_tx_config(npi_handle_t handle, config_op_t op, uint8_t portn,
2634 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
2645 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2648 BMAC_REG_RD(handle, portn, TXMAC_CONFIG_REG, &val);
2653 BMAC_REG_WR(handle, portn, TXMAC_CONFIG_REG, val);
2655 BMAC_REG_RD(handle, portn, TXMAC_CONFIG_REG, &val);
2660 BMAC_REG_WR(handle, portn, TXMAC_CONFIG_REG, val);
2670 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2672 BMAC_REG_RD(handle, portn, TXMAC_CONFIG_REG, &val);
2681 BMAC_REG_WR(handle, portn, TXMAC_CONFIG_REG, val);
2688 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2695 npi_bmac_rx_config(npi_handle_t handle, config_op_t op, uint8_t portn,
2700 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
2711 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2714 BMAC_REG_RD(handle, portn, RXMAC_CONFIG_REG, &val);
2731 BMAC_REG_WR(handle, portn, RXMAC_CONFIG_REG, val);
2733 BMAC_REG_RD(handle, portn, RXMAC_CONFIG_REG, &val);
2750 BMAC_REG_WR(handle, portn, RXMAC_CONFIG_REG, val);
2760 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2762 BMAC_REG_RD(handle, portn, RXMAC_CONFIG_REG, &val);
2796 BMAC_REG_WR(handle, portn, RXMAC_CONFIG_REG, val);
2802 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2809 npi_bmac_rx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn,
2814 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
2825 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2827 BMAC_REG_RD(handle, portn, BRXMAC_STAT_MSK_REG, &val);
2832 BMAC_REG_WR(handle, portn, BRXMAC_STAT_MSK_REG, val);
2842 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2844 BMAC_REG_WR(handle, portn, BRXMAC_STAT_MSK_REG, ~iconfig);
2852 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2859 npi_bmac_xif_config(npi_handle_t handle, config_op_t op, uint8_t portn,
2864 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
2875 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2878 BMAC_REG_RD(handle, portn, MAC_XIF_CONFIG_REG, &val);
2891 BMAC_REG_WR(handle, portn, MAC_XIF_CONFIG_REG, val);
2893 BMAC_REG_RD(handle, portn, MAC_XIF_CONFIG_REG, &val);
2906 BMAC_REG_WR(handle, portn, MAC_XIF_CONFIG_REG, val);
2916 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2918 BMAC_REG_RD(handle, portn, MAC_XIF_CONFIG_REG, &val);
2943 BMAC_REG_WR(handle, portn, MAC_XIF_CONFIG_REG, val);
2950 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
2957 npi_bmac_tx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn,
2962 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
2973 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2975 BMAC_REG_RD(handle, portn, BTXMAC_STAT_MSK_REG, &val);
2980 BMAC_REG_WR(handle, portn, BTXMAC_STAT_MSK_REG, val);
2990 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
2992 BMAC_REG_WR(handle, portn, BTXMAC_STAT_MSK_REG, ~iconfig);
3000 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
3007 npi_bmac_ctl_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn,
3012 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
3023 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
3025 BMAC_REG_RD(handle, portn, BMAC_C_S_MSK_REG, &val);
3030 BMAC_REG_WR(handle, portn, BMAC_C_S_MSK_REG, val);
3040 return (NPI_FAILURE | NPI_MAC_CONFIG_INVALID(portn));
3042 BMAC_REG_WR(handle, portn, BMAC_C_S_MSK_REG, ~iconfig);
3050 return (NPI_FAILURE | NPI_MAC_OPCODE_INVALID(portn));
3057 npi_bmac_tx_get_istatus(npi_handle_t handle, uint8_t portn,
3062 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
3064 BMAC_REG_RD(handle, portn, BTXMAC_STATUS_REG, &val);
3071 npi_bmac_rx_get_istatus(npi_handle_t handle, uint8_t portn,
3076 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
3078 BMAC_REG_RD(handle, portn, BRXMAC_STATUS_REG, &val);
3085 npi_bmac_ctl_get_istatus(npi_handle_t handle, uint8_t portn,
3090 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
3092 BMAC_REG_RD(handle, portn, BMAC_CTRL_STAT_REG, &val);
3099 npi_mac_mif_mdio_read(npi_handle_t handle, uint8_t portn, uint8_t device,
3108 frame.bits.w0.phyad = portn; /* Port number */
3115 "mdio read port %d addr val=0x%x\n", portn, frame.value));
3123 "mdio read port %d addr poll=0x%x\n", portn, frame.value));
3132 frame.bits.w0.phyad = portn; /* Port Number */
3138 "mdio read port %d data frame=0x%x\n", portn, frame.value));
3146 "mdio read port %d data poll=0x%x\n", portn, frame.value));
3150 "mdio read port=%d val=0x%x\n", portn, *value));
3161 npi_mac_mif_mii_read(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg,
3169 frame.bits.w0.phyad = portn;
3179 return (NPI_FAILURE | NPI_MAC_MII_READ_FAILED(portn));
3183 "mif mii read port %d reg=0x%x frame=0x%x\n", portn,
3190 npi_mac_mif_mdio_write(npi_handle_t handle, uint8_t portn, uint8_t device,
3199 frame.bits.w0.phyad = portn; /* Port Number */
3208 "mdio write port %d addr val=0x%x\n", portn, frame.value));
3214 "mdio write port %d addr poll=0x%x\n", portn, frame.value));
3223 frame.bits.w0.phyad = portn; /* Port number */
3231 "mdio write port %d data val=0x%x\n", portn, frame.value));
3237 "mdio write port %d data poll=0x%x\n", portn, frame.value));
3248 npi_mac_mif_mii_write(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg,
3256 frame.bits.w0.phyad = portn;
3267 "mif mii write port %d reg=0x%x frame=0x%x\n", portn,
3271 return (NPI_FAILURE | NPI_MAC_MII_WRITE_FAILED(portn));
3277 npi_mac_pcs_mii_read(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg,
3291 ASSERT(IS_PORT_NUM_VALID(portn));
3295 PCS_REG_RD(handle, portn, PCS_MII_CTRL_REG, &val);
3299 PCS_REG_RD(handle, portn, PCS_MII_STATUS_REG, &val);
3301 PCS_REG_RD(handle, portn, PCS_STATE_MACHINE_REG, &val);
3312 PCS_REG_RD(handle, portn, PCS_MII_ADVERT_REG, &val);
3320 PCS_REG_RD(handle, portn, PCS_MII_ADVERT_REG, &val);
3328 PCS_REG_RD(handle, portn, PCS_MII_LPA_REG, &val);
3335 PCS_REG_RD(handle, portn, PCS_MII_ADVERT_REG, &val);
3343 PCS_REG_RD(handle, portn, PCS_MII_LPA_REG, &val);
3355 return (NPI_FAILURE | NPI_MAC_REG_INVALID(portn));
3362 npi_mac_pcs_mii_write(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg,
3370 ASSERT(IS_PORT_NUM_VALID(portn));
3375 PCS_REG_WR(handle, portn, PCS_MII_CTRL_REG, val);
3378 PCS_REG_RD(handle, portn, PCS_MII_ADVERT_REG, &val);
3384 PCS_REG_WR(handle, portn, PCS_MII_ADVERT_REG, val);
3387 PCS_REG_RD(handle, portn, PCS_MII_ADVERT_REG, &val);
3393 PCS_REG_WR(handle, portn, PCS_MII_ADVERT_REG, val);
3400 return (NPI_FAILURE | NPI_MAC_REG_INVALID(portn));
3407 npi_mac_mif_link_intr_enable(npi_handle_t handle, uint8_t portn,
3412 ASSERT(IS_PORT_NUM_VALID(portn));
3420 return (NPI_FAILURE | NPI_MAC_REG_INVALID(portn));
3425 mif_cfg.bits.w0.phy_addr = portn; /* Port number */
3439 npi_mac_mif_mdio_link_intr_enable(npi_handle_t handle, uint8_t portn,
3446 ASSERT(IS_PORT_NUM_VALID(portn));
3450 frame.bits.w0.phyad = portn; /* Port number */
3465 mif_cfg.bits.w0.phy_addr = portn; /* Port number */
3499 npi_bmac_send_pause(npi_handle_t handle, uint8_t portn, uint16_t pause_time)
3503 ASSERT(IS_BMAC_PORT_NUM_VALID(portn));
3506 BMAC_REG_WR(handle, portn, MAC_SEND_PAUSE_REG, val);
3512 npi_xmac_xif_led(npi_handle_t handle, uint8_t portn, boolean_t on_off)
3516 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
3518 XMAC_REG_RD(handle, portn, XMAC_CONFIG_REG, &val);
3528 XMAC_REG_WR(handle, portn, XMAC_CONFIG_REG, val);
3534 npi_xmac_zap_tx_counters(npi_handle_t handle, uint8_t portn)
3536 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
3538 XMAC_REG_WR(handle, portn, XTXMAC_FRM_CNT_REG, 0);
3539 XMAC_REG_WR(handle, portn, XTXMAC_BYTE_CNT_REG, 0);
3545 npi_xmac_zap_rx_counters(npi_handle_t handle, uint8_t portn)
3547 ASSERT(IS_XMAC_PORT_NUM_VALID(portn));
3549 XMAC_REG_WR(handle, portn, XRXMAC_BT_CNT_REG, 0);
3550 XMAC_REG_WR(handle, portn, XRXMAC_BC_FRM_CNT_REG, 0);
3551 XMAC_REG_WR(handle, portn, XRXMAC_MC_FRM_CNT_REG, 0);
3552 XMAC_REG_WR(handle, portn, XRXMAC_FRAG_CNT_REG, 0);
3553 XMAC_REG_WR(handle, portn, XRXMAC_HIST_CNT1_REG, 0);
3554 XMAC_REG_WR(handle, portn, XRXMAC_HIST_CNT2_REG, 0);
3555 XMAC_REG_WR(handle, portn, XRXMAC_HIST_CNT3_REG, 0);
3556 XMAC_REG_WR(handle, portn, XRXMAC_HIST_CNT4_REG, 0);
3557 XMAC_REG_WR(handle, portn, XRXMAC_HIST_CNT5_REG, 0);
3558 XMAC_REG_WR(handle, portn, XRXMAC_HIST_CNT6_REG, 0);
3559 XMAC_REG_WR(handle, portn, XRXMAC_MPSZER_CNT_REG, 0);
3560 XMAC_REG_WR(handle, portn, XRXMAC_CRC_ER_CNT_REG, 0);
3561 XMAC_REG_WR(handle, portn, XRXMAC_CD_VIO_CNT_REG, 0);
3562 XMAC_REG_WR(handle, portn, XRXMAC_AL_ER_CNT_REG, 0);
3563 XMAC_REG_WR(handle, portn, XMAC_LINK_FLT_CNT_REG, 0);