Cross Reference: /illumos-gate/usr/src/uts/common/io/nvme/nvme.c

Lines Matching refs:sqe_opc
839 	    "sc = %x, sct = %x, dnr = %d, m = %d", cmd->nc_sqe.sqe_opc,
860 	    "sc = %x, sct = %x, dnr = %d, m = %d", cmd->nc_sqe.sqe_opc,
1002 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_CREATE_SQUEUE);
1008 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_CREATE_SQUEUE ||
1009 		    cmd->nc_sqe.sqe_opc == NVME_OPC_DELETE_SQUEUE ||
1010 		    cmd->nc_sqe.sqe_opc == NVME_OPC_CREATE_CQUEUE ||
1011 		    cmd->nc_sqe.sqe_opc == NVME_OPC_DELETE_CQUEUE);
1017 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_CREATE_SQUEUE ||
1018 		    cmd->nc_sqe.sqe_opc == NVME_OPC_CREATE_CQUEUE);
1024 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_ABORT);
1031 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_ASYNC_EVENT);
1039 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_CREATE_CQUEUE);
1045 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_GET_LOG_PAGE);
1052 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_FORMAT);
1059 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_DELETE_CQUEUE);
1065 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_DSET_MGMT ||
1066 		    cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_READ ||
1067 		    cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_WRITE);
1074 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_COMPARE ||
1075 		    cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_READ ||
1076 		    cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_WRITE);
1083 		ASSERT(cmd->nc_sqe.sqe_opc == NVME_OPC_NVM_WRITE);
1156 	cmd->nc_sqe.sqe_opc = NVME_OPC_ABORT;
1226 	    "OPC = %x, CFS = %d", cmd->nc_sqe.sqe_opc, csts.b.csts_cfs);
1232 	    cmd->nc_sqe.sqe_opc == NVME_OPC_ABORT) {
1469 	cmd->nc_sqe.sqe_opc = NVME_OPC_ASYNC_EVENT;
1497 	cmd->nc_sqe.sqe_opc = NVME_OPC_GET_LOG_PAGE;
1583 	cmd->nc_sqe.sqe_opc = NVME_OPC_IDENTIFY;
1643 	cmd->nc_sqe.sqe_opc = NVME_OPC_SET_FEATURES;
1731 	cmd->nc_sqe.sqe_opc = NVME_OPC_CREATE_CQUEUE;
1758 	cmd->nc_sqe.sqe_opc = NVME_OPC_CREATE_SQUEUE;
2862 	cmd->nc_sqe.sqe_opc = opc;