Lines Matching refs:mgp
357 ss->mgp->icookie);
369 ss->mgp->name);
566 err = ddi_dma_alloc_handle(ss->mgp->dip, rx_dma_attr,
777 struct myri10ge_priv *mgp = ss->mgp;
782 err = ddi_dma_alloc_handle(mgp->dip,
790 mgp->name);
821 ss->mgp->name,
936 ss->mgp->name);
943 ss->tx.cp[h].va = myri10ge_dma_alloc(ss->mgp->dip,
950 "copyblock %d\n", ss->mgp->name, h);
983 myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
993 ptr = mgp->eeprom_strings;
994 limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
1000 printf("%s: mac address = %s\n", mgp->name,
1002 mgp->mac_addr_string = ptr;
1014 mgp->mac_addr[i] = (hv << 4) | lv;
1020 mgp->sn_str = (char *)ptr;
1024 mgp->pc_str = (char *)ptr;
1032 cmn_err(CE_WARN, "%s: failed to parse eeprom_strings", mgp->name);
1143 myri10ge_load_firmware_from_zlib(struct myri10ge_priv *mgp, uint32_t *limit)
1147 size_t sram_size = mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE;
1160 mgp->name);
1165 rv = z_uncompress(inflate_buffer, &destlen, mgp->eth_z8e,
1166 mgp->eth_z8e_length);
1170 mgp->name, z_strerror(rv));
1181 cmn_err(CE_WARN, "%s: Bad firmware type: 0x%x\n", mgp->name,
1188 (void) strncpy(mgp->fw_version, hdr->version, sizeof (mgp->fw_version));
1190 printf("%s: firmware id: %s\n", mgp->name, hdr->version);
1194 myri10ge_pio_copy((char *)mgp->sram + MYRI10GE_FW_OFFSET + i,
1198 (void) *(int *)(void *)mgp->sram;
1211 myri10ge_send_cmd(struct myri10ge_priv *mgp, uint32_t cmd,
1216 volatile mcp_cmd_response_t *response = mgp->cmd;
1218 (volatile char *)mgp->sram + MXGEFW_ETH_CMD;
1228 buf->response_addr.low = mgp->cmd_dma.low;
1229 buf->response_addr.high = mgp->cmd_dma.high;
1230 mutex_enter(&mgp->cmd_lock);
1242 mutex_exit(&mgp->cmd_lock);
1246 mutex_exit(&mgp->cmd_lock);
1250 mutex_exit(&mgp->cmd_lock);
1255 mgp->name, cmd, ntohl(response->result));
1256 mutex_exit(&mgp->cmd_lock);
1262 mutex_exit(&mgp->cmd_lock);
1264 mgp->name, cmd, ntohl(response->result));
1274 myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
1285 confirm = (volatile uint32_t *)mgp->cmd;
1295 buf[0] = mgp->cmd_dma.high; /* confirm addr MSW */
1296 buf[1] = mgp->cmd_dma.low; /* confirm addr LSW */
1298 buf[3] = htonl(mgp->cmd_dma.high); /* dummy addr MSW */
1299 buf[4] = htonl(mgp->cmd_dma.low); /* dummy addr LSW */
1303 submit = (volatile char *)(mgp->sram + MXGEFW_BOOT_DUMMY_RDMA);
1316 mgp->name,
1322 myri10ge_load_firmware(struct myri10ge_priv *mgp)
1333 status = myri10ge_load_firmware_from_zlib(mgp, &size);
1335 cmn_err(CE_WARN, "%s: firmware loading failed\n", mgp->name);
1340 confirm = (volatile uint32_t *)mgp->cmd;
1350 buf[0] = mgp->cmd_dma.high; /* confirm addr MSW */
1351 buf[1] = mgp->cmd_dma.low; /* confirm addr LSW */
1364 submit = (volatile char *)(mgp->sram + MXGEFW_BOOT_HANDOFF);
1377 mgp->name, (void *) confirm, *confirm);
1381 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd);
1384 mgp->name);
1388 mgp->max_intr_slots = 2 * (cmd.data0 / sizeof (mcp_dma_addr_t));
1389 myri10ge_dummy_rdma(mgp, 1);
1396 struct myri10ge_priv *mgp = arg;
1405 status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd);
1406 if (status == 0 && (addr != mgp->mac_addr))
1407 (void) memcpy(mgp->mac_addr, addr, sizeof (mgp->mac_addr));
1413 myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
1419 status = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_FLOW_CONTROL,
1422 status = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_FLOW_CONTROL,
1427 mgp->name);
1430 mgp->pause = pause;
1435 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc)
1441 status = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_PROMISC, &cmd);
1443 status = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_PROMISC, &cmd);
1447 mgp->name);
1452 myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
1471 len = mgp->tx_boundary;
1473 dmabench = myri10ge_dma_alloc(mgp->dip, len,
1477 mgp->read_dma = mgp->write_dma = mgp->read_write_dma = 0;
1479 cmn_err(CE_WARN, "%s dma benchmark aborted\n", mgp->name);
1486 status = myri10ge_send_cmd(mgp, test_type, &cmd);
1491 mgp->read_dma = ((cmd.data0>>16) * len * 2) / (cmd.data0 & 0xffff);
1496 status = myri10ge_send_cmd(mgp, test_type, &cmd);
1501 mgp->write_dma = ((cmd.data0>>16) * len * 2) / (cmd.data0 & 0xffff);
1506 status = myri10ge_send_cmd(mgp, test_type, &cmd);
1511 mgp->read_write_dma = ((cmd.data0>>16) * len * 2 * 2) /
1518 cmn_err(CE_WARN, "%s %s dma benchmark failed\n", mgp->name,
1524 myri10ge_reset(struct myri10ge_priv *mgp)
1534 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd);
1536 cmn_err(CE_WARN, "%s: failed reset\n", mgp->name);
1542 bytes = mgp->max_intr_slots * sizeof (*mgp->ss[0].rx_done.entry);
1544 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd);
1557 if (mgp->num_slices > 1) {
1560 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES,
1565 mgp->name);
1574 cmd.data0 = mgp->num_slices;
1577 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
1582 mgp->name);
1586 for (i = 0; i < mgp->num_slices; i++) {
1587 ss = &mgp->ss[i];
1591 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA,
1595 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd);
1596 for (i = 0; i < mgp->num_slices; i++) {
1597 ss = &mgp->ss[i];
1599 (void *)(mgp->sram + cmd.data0 + 8 * i);
1602 if (mgp->ddi_intr_type == DDI_INTR_TYPE_FIXED) {
1603 status |= myri10ge_send_cmd(mgp,
1605 mgp->irq_deassert = (uint32_t *)(void *)(mgp->sram + cmd.data0);
1608 status |= myri10ge_send_cmd(mgp,
1610 mgp->intr_coal_delay_ptr = (uint32_t *)(void *)(mgp->sram + cmd.data0);
1614 mgp->name);
1618 *mgp->intr_coal_delay_ptr = htonl(mgp->intr_coal_delay);
1619 (void) myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
1623 for (i = 0; i < mgp->num_slices; i++) {
1624 ss = &mgp->ss[i];
1625 bytes = mgp->max_intr_slots *
1626 sizeof (*mgp->ss[0].rx_done.entry);
1641 mgp->watchdog_rx_pause = 0;
1642 if (mgp->ksp_stat != NULL) {
1643 ethstat = (struct myri10ge_nic_stat *)mgp->ksp_stat->ks_data;
1646 status = myri10ge_m_unicst(mgp, mgp->mac_addr);
1647 myri10ge_change_promisc(mgp, 0);
1648 (void) myri10ge_change_pause(mgp, mgp->pause);
1653 myri10ge_init_toeplitz(struct myri10ge_priv *mgp)
1662 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RSS_KEY_OFFSET,
1666 mgp->name);
1669 myri10ge_pio_copy32(mgp->rss_key,
1670 (uint32_t *)(void*)((char *)mgp->sram + cmd.data0),
1671 sizeof (mgp->rss_key));
1673 mgp->toeplitz_hash_table = kmem_alloc(sizeof (uint32_t) * 12 * 256,
1675 key = (uint8_t *)mgp->rss_key;
1698 mgp->toeplitz_hash_table[t++] = tmp;
1705 myri10ge_toeplitz_send_hash(struct myri10ge_priv *mgp, struct ip *ip)
1710 uint32_t *table = mgp->toeplitz_hash_table;
1743 slice = (mgp->num_slices - 1) & hash;
1744 return (&mgp->ss[slice]);
1749 myri10ge_simple_send_hash(struct myri10ge_priv *mgp, struct ip *ip)
1756 return (&mgp->ss[0]);
1768 slice = (mgp->num_slices - 1) & hash_val;
1769 return (&mgp->ss[slice]);
1773 myri10ge_send_hash(struct myri10ge_priv *mgp, mblk_t *mp)
1781 if (mgp->num_slices == 1)
1782 return (&mgp->ss[0]);
1785 slice = CPU->cpu_id & (mgp->num_slices - 1);
1786 return (&mgp->ss[slice]);
1796 return (&mgp->ss[0]);
1801 return (&mgp->ss[0]);
1804 return (&mgp->ss[0]);
1810 return (&mgp->ss[0]);
1817 return (myri10ge_toeplitz_send_hash(mgp, ip));
1821 return (myri10ge_simple_send_hash(mgp, ip));
1825 return (&mgp->ss[0]);
1831 struct myri10ge_priv *mgp = ss->mgp;
1839 slice = ss - mgp->ss;
1841 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd);
1844 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd);
1857 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd);
1858 ss->tx.lanai = (mcp_kreq_ether_send_t *)(void *)(mgp->sram + cmd.data0);
1859 if (mgp->num_slices > 1) {
1860 ss->tx.go = (char *)mgp->sram + MXGEFW_ETH_SEND_GO + 64 * slice;
1861 ss->tx.stop = (char *)mgp->sram + MXGEFW_ETH_SEND_STOP +
1869 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET, &cmd);
1871 (void *)(mgp->sram + cmd.data0);
1874 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd);
1876 (mgp->sram + cmd.data0);
1880 "%s: failed to get ring sizes or locations\n", mgp->name);
1928 mgp->name, allocated,
1976 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd);
1981 status = myri10ge_send_cmd(mgp,
1985 cmn_err(CE_WARN, "%s: Couldn't set stats DMA\n", mgp->name);
2072 myri10ge_start_locked(struct myri10ge_priv *mgp)
2081 status = myri10ge_reset(mgp);
2083 cmn_err(CE_WARN, "%s: failed reset\n", mgp->name);
2087 if (mgp->num_slices > 1) {
2088 cmd.data0 = mgp->num_slices;
2090 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
2095 mgp->name);
2099 cmd.data0 = mgp->num_slices;
2100 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_TABLE_SIZE,
2103 status |= myri10ge_send_cmd(mgp,
2107 "%s: failed to setup rss tables\n", mgp->name);
2111 itable = mgp->sram + cmd.data0;
2112 for (i = 0; i < mgp->num_slices; i++)
2116 status = myri10ge_init_toeplitz(mgp);
2119 "toeplitz tx hash table", mgp->name);
2125 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_ENABLE,
2129 "%s: failed to enable slices\n", mgp->name);
2134 for (i = 0; i < mgp->num_slices; i++) {
2135 status = myri10ge_setup_slice(&mgp->ss[i]);
2154 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd);
2157 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd);
2159 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd);
2161 cmn_err(CE_WARN, "%s: Couldn't set buffer sizes\n", mgp->name);
2167 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_TSO_MODE, &cmd);
2170 mgp->name, status);
2172 mgp->features |= MYRI10GE_TSO;
2175 mgp->link_state = -1;
2176 mgp->rdma_tags_available = 15;
2177 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd);
2179 cmn_err(CE_WARN, "%s: unable to start ethernet\n", mgp->name);
2182 mgp->running = MYRI10GE_ETH_RUNNING;
2186 for (i = 0; i < mgp->num_slices; i++)
2187 myri10ge_teardown_slice(&mgp->ss[i]);
2189 mgp->running = MYRI10GE_ETH_STOPPED;
2192 if (mgp->toeplitz_hash_table != NULL) {
2193 kmem_free(mgp->toeplitz_hash_table,
2195 mgp->toeplitz_hash_table = NULL;
2203 myri10ge_stop_locked(struct myri10ge_priv *mgp)
2210 old_down_cnt = mgp->down_cnt;
2212 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd);
2214 cmn_err(CE_WARN, "%s: Couldn't bring down link\n", mgp->name);
2217 while (old_down_cnt == *((volatile int *)&mgp->down_cnt)) {
2224 if (old_down_cnt == *((volatile int *)&mgp->down_cnt)) {
2225 cmn_err(CE_WARN, "%s: didn't get down irq\n", mgp->name);
2226 for (i = 0; i < mgp->num_slices; i++) {
2234 mutex_enter(&mgp->ss[i].rx_lock);
2236 mgp->name, i);
2237 mutex_exit(&mgp->ss[i].rx_lock);
2240 mutex_enter(&mgp->ss->poll_lock);
2241 polling = mgp->ss->rx_polling;
2242 mutex_exit(&mgp->ss->poll_lock);
2245 mgp->name, i);
2251 if (old_down_cnt == *((volatile int *)&mgp->down_cnt)) {
2252 cmn_err(CE_WARN, "%s: Never got down irq\n", mgp->name);
2256 for (i = 0; i < mgp->num_slices; i++)
2257 myri10ge_teardown_slice(&mgp->ss[i]);
2259 if (mgp->toeplitz_hash_table != NULL) {
2260 kmem_free(mgp->toeplitz_hash_table,
2262 mgp->toeplitz_hash_table = NULL;
2264 mgp->running = MYRI10GE_ETH_STOPPED;
2270 struct myri10ge_priv *mgp = arg;
2273 mutex_enter(&mgp->intrlock);
2275 if (mgp->running != MYRI10GE_ETH_STOPPED) {
2276 mutex_exit(&mgp->intrlock);
2279 status = myri10ge_start_locked(mgp);
2280 mutex_exit(&mgp->intrlock);
2286 mgp->timer_id = timeout(myri10ge_watchdog, mgp,
2287 mgp->timer_ticks);
2295 struct myri10ge_priv *mgp = arg;
2297 mutex_enter(&mgp->intrlock);
2299 if (mgp->running != MYRI10GE_ETH_RUNNING) {
2300 mutex_exit(&mgp->intrlock);
2304 mgp->running = MYRI10GE_ETH_STOPPING;
2305 mutex_exit(&mgp->intrlock);
2306 (void) untimeout(mgp->timer_id);
2307 mutex_enter(&mgp->intrlock);
2308 myri10ge_stop_locked(mgp);
2309 mutex_exit(&mgp->intrlock);
2445 ss->mgp->name, idx, ss->rx_big.cnt, ss->j_rx_cnt);
2557 mac_tx_ring_update(ss->mgp->mh, tx->rh);
2606 struct myri10ge_priv *mgp = ss->mgp;
2637 rx_done->idx = rx_done->cnt & (mgp->max_intr_slots - 1);
2659 mac_rx_ring(ss->mgp->mh, ss->rx_rh, mbl.head, gen);
2680 ss->mgp->ss), ss->rx_token, ss->rx_polling);
2691 struct myri10ge_priv *mgp = ss->mgp;
2708 if (mgp->ddi_intr_type == DDI_INTR_TYPE_FIXED) {
2710 *mgp->irq_deassert = 0;
2728 if (mgp->link_state != stats->link_up || stats->link_down) {
2729 mgp->link_state = stats->link_up;
2731 mgp->down_cnt += stats->link_down;
2732 mgp->link_state = 0;
2734 if (mgp->link_state) {
2736 printf("%s: link up\n", mgp->name);
2737 mac_link_update(mgp->mh, LINK_STATE_UP);
2740 printf("%s: link down\n", mgp->name);
2741 mac_link_update(mgp->mh, LINK_STATE_DOWN);
2745 if (mgp->rdma_tags_available !=
2747 mgp->rdma_tags_available =
2750 "%d tags left\n", mgp->name,
2751 mgp->rdma_tags_available);
2780 struct myri10ge_priv *mgp = arg;
2791 status = myri10ge_send_cmd(mgp, join_leave, &cmd);
2796 mgp->name);
2804 struct myri10ge_priv *mgp = arg;
2806 myri10ge_change_promisc(mgp, on);
3122 struct myri10ge_priv *mgp = ss->mgp;
3134 tx_boundary = mgp->tx_boundary;
3252 boundary = (low + mgp->tx_boundary) &
3253 ~(mgp->tx_boundary - 1);
3335 struct myri10ge_priv *mgp = ss->mgp;
3461 if ((mss < mgp->tx_boundary) && lso_copy) {
3526 boundary = (low + mgp->tx_boundary) &
3527 ~(mgp->tx_boundary - 1);
3736 struct myri10ge_priv *mgp = arg;
3742 mutex_enter(&mgp->intrlock);
3743 if (mgp->macaddr_cnt) {
3744 mutex_exit(&mgp->intrlock);
3747 err = myri10ge_m_unicst(mgp, mac_addr);
3749 mgp->macaddr_cnt++;
3751 mutex_exit(&mgp->intrlock);
3755 bcopy(mac_addr, mgp->mac_addr, sizeof (mgp->mac_addr));
3763 struct myri10ge_priv *mgp = arg;
3765 mutex_enter(&mgp->intrlock);
3766 mgp->macaddr_cnt--;
3767 mutex_exit(&mgp->intrlock);
3777 struct myri10ge_priv *mgp = arg;
3782 infop->mgi_driver = (mac_group_driver_t)mgp;
3787 infop->mgi_count = mgp->num_slices;
3887 struct myri10ge_priv *mgp = arg;
3891 ASSERT((unsigned int)ring_index < mgp->num_slices);
3893 ss = &mgp->ss[ring_index];
3920 myri10ge_nic_stat_destroy(struct myri10ge_priv *mgp)
3922 if (mgp->ksp_stat == NULL)
3925 kstat_delete(mgp->ksp_stat);
3926 mgp->ksp_stat = NULL;
3940 myri10ge_info_destroy(struct myri10ge_priv *mgp)
3942 if (mgp->ksp_info == NULL)
3945 kstat_delete(mgp->ksp_info);
3946 mgp->ksp_info = NULL;
3953 struct myri10ge_priv *mgp;
3961 mgp = (struct myri10ge_priv *)ksp->ks_private;
3962 fw_stats = mgp->ss[0].fw_stats;
3964 ethstat->dma_read_bw_MBs.value.ul = mgp->read_dma;
3965 ethstat->dma_write_bw_MBs.value.ul = mgp->write_dma;
3966 ethstat->dma_read_write_bw_MBs.value.ul = mgp->read_write_dma;
3971 ethstat->lanes.value.ul = mgp->pcie_link_width;
4033 struct myri10ge_priv *mgp;
4040 mgp = (struct myri10ge_priv *)ksp->ks_private;
4042 kstat_named_setstr(&info->firmware_version, mgp->fw_version);
4043 kstat_named_setstr(&info->firmware_name, mgp->fw_name);
4044 kstat_named_setstr(&info->interrupt_type, mgp->intr_type);
4045 kstat_named_setstr(&info->product_code, mgp->pc_str);
4046 kstat_named_setstr(&info->serial_number, mgp->sn_str);
4062 myri10ge_info_init(struct myri10ge_priv *mgp)
4066 ksp = kstat_create("myri10ge", ddi_get_instance(mgp->dip),
4072 "%s: myri10ge_info_init: kstat_create failed", mgp->name);
4075 mgp->ksp_info = ksp;
4077 ksp->ks_private = (void *) mgp;
4082 if (mgp->fw_version != NULL)
4083 ksp->ks_data_size += strlen(mgp->fw_version) + 1;
4084 ksp->ks_data_size += strlen(mgp->fw_name) + 1;
4085 ksp->ks_data_size += strlen(mgp->intr_type) + 1;
4086 if (mgp->pc_str != NULL)
4087 ksp->ks_data_size += strlen(mgp->pc_str) + 1;
4088 if (mgp->sn_str != NULL)
4089 ksp->ks_data_size += strlen(mgp->sn_str) + 1;
4097 myri10ge_nic_stat_init(struct myri10ge_priv *mgp)
4102 ksp = kstat_create("myri10ge", ddi_get_instance(mgp->dip),
4107 "%s: myri10ge_stat_init: kstat_create failed", mgp->name);
4110 mgp->ksp_stat = ksp;
4151 ksp->ks_private = (void *) mgp;
4159 struct myri10ge_priv *mgp = ss->mgp;
4168 instance = (ddi_get_instance(mgp->dip) * 1000) + (int)(ss - mgp->ss);
4174 "%s: myri10ge_stat_init: kstat_create failed", mgp->name);
4245 myri10ge_enable_nvidia_ecrc(struct myri10ge_priv *mgp)
4260 parent_dip = ddi_get_parent(mgp->dip);
4262 cmn_err(CE_WARN, "%s: I'm an orphan?", mgp->name);
4268 "%s: Could not access my parent's registers", mgp->name);
4282 printf("%s: parent at %ld:%ld:%ld\n", mgp->name,
4310 mgp->name);
4324 "at %ld:%ld:%ld\n", mgp->name,
4338 myri10ge_enable_nvidia_ecrc(struct myri10ge_priv *mgp)
4365 myri10ge_firmware_probe(struct myri10ge_priv *mgp)
4369 mgp->tx_boundary = 4096;
4374 if (mgp->max_read_request_4k == 0)
4375 mgp->tx_boundary = 2048;
4381 mgp->fw_name = "rss_eth_z8e";
4382 mgp->eth_z8e = (unsigned char *)rss_eth_z8e;
4383 mgp->eth_z8e_length = rss_eth_z8e_length;
4385 status = myri10ge_load_firmware(mgp);
4392 myri10ge_enable_nvidia_ecrc(mgp);
4398 status = myri10ge_dma_test(mgp, MXGEFW_CMD_UNALIGNED_TEST);
4404 mgp->name, status);
4407 "Please install up to date fw\n", mgp->name);
4412 myri10ge_select_firmware(struct myri10ge_priv *mgp)
4421 mgp->name);
4429 mgp->name);
4435 if (mgp->pcie_link_width != 0 && mgp->pcie_link_width < 8) {
4437 mgp->name, mgp->pcie_link_width);
4442 if (0 == myri10ge_firmware_probe(mgp))
4447 mgp->fw_name = "rss_eth_z8e";
4448 mgp->eth_z8e = (unsigned char *)rss_eth_z8e;
4449 mgp->eth_z8e_length = rss_eth_z8e_length;
4450 mgp->tx_boundary = 4096;
4452 mgp->fw_name = "rss_ethp_z8e";
4453 mgp->eth_z8e = (unsigned char *)rss_ethp_z8e;
4454 mgp->eth_z8e_length = rss_ethp_z8e_length;
4455 mgp->tx_boundary = 2048;
4458 return (myri10ge_load_firmware(mgp));
4462 myri10ge_add_intrs(struct myri10ge_priv *mgp, int add_handler)
4464 dev_info_t *devinfo = mgp->dip;
4472 "!%s: ddi_intr_get_nintrs() failure, rc = %d\n", mgp->name,
4483 mgp->ddi_intr_type = DDI_INTR_TYPE_MSIX;
4484 mgp->intr_type = "MSI-X";
4486 mgp->ddi_intr_type = DDI_INTR_TYPE_MSI;
4487 mgp->intr_type = "MSI";
4489 mgp->ddi_intr_type = DDI_INTR_TYPE_FIXED;
4490 mgp->intr_type = "Legacy";
4493 rc = ddi_intr_get_nintrs(devinfo, mgp->ddi_intr_type, &count);
4496 "count: %d", mgp->name, rc, count);
4502 rc = ddi_intr_get_navail(devinfo, mgp->ddi_intr_type, &avail);
4505 "rc: %d, avail: %d\n", mgp->name, rc, avail);
4511 mgp->name, count, avail);
4515 if (count < mgp->num_slices)
4518 if (count > mgp->num_slices)
4519 count = mgp->num_slices;
4522 mgp->intr_size = count * sizeof (ddi_intr_handle_t);
4523 mgp->htable = kmem_alloc(mgp->intr_size, KM_SLEEP);
4525 rc = ddi_intr_alloc(devinfo, mgp->htable, mgp->ddi_intr_type, inum,
4530 mgp->name, rc);
4532 kmem_free(mgp->htable, mgp->intr_size);
4533 mgp->htable = NULL;
4539 mgp->name, actual, count);
4542 mgp->intr_cnt = actual;
4547 if (ddi_intr_get_pri(mgp->htable[0], &mgp->intr_pri)
4549 cmn_err(CE_WARN, "%s: ddi_intr_get_pri() failed", mgp->name);
4553 (void) ddi_intr_free(mgp->htable[y]);
4556 kmem_free(mgp->htable, mgp->intr_size);
4557 mgp->htable = NULL;
4561 mgp->icookie = (void *)(uintptr_t)mgp->intr_pri;
4568 if (ddi_intr_add_handler(mgp->htable[x], myri10ge_intr,
4569 (caddr_t)&mgp->ss[x], NULL) != DDI_SUCCESS) {
4571 mgp->name);
4575 (void) ddi_intr_free(mgp->htable[y]);
4578 kmem_free(mgp->htable, mgp->intr_size);
4579 mgp->htable = NULL;
4584 (void) ddi_intr_get_cap(mgp->htable[0], &mgp->intr_cap);
4585 if (mgp->intr_cap & DDI_INTR_FLAG_BLOCK) {
4587 (void) ddi_intr_block_enable(mgp->htable, mgp->intr_cnt);
4590 for (x = 0; x < mgp->intr_cnt; x++) {
4591 (void) ddi_intr_enable(mgp->htable[x]);
4599 myri10ge_rem_intrs(struct myri10ge_priv *mgp, int handler_installed)
4605 if (mgp->intr_cap & DDI_INTR_FLAG_BLOCK) {
4607 (void) ddi_intr_block_disable(mgp->htable,
4608 mgp->intr_cnt);
4610 for (x = 0; x < mgp->intr_cnt; x++) {
4611 (void) ddi_intr_disable(mgp->htable[x]);
4616 for (x = 0; x < mgp->intr_cnt; x++) {
4619 err = ddi_intr_remove_handler(mgp->htable[x]);
4623 "vec %d returned %d\n", mgp->name,
4627 err = ddi_intr_free(mgp->htable[x]);
4631 mgp->name, x, err);
4634 kmem_free(mgp->htable, mgp->intr_size);
4635 mgp->htable = NULL;
4873 myri10ge_reset_nic(struct myri10ge_priv *mgp)
4875 ddi_acc_handle_t handle = mgp->cfg_hdl;
4889 pci_config_put8(handle, mgp->vso + 0x10, 0x3);
4891 pci_config_put32(handle, mgp->vso + 0x18, 0xfffffff0);
4892 reboot = pci_config_get16(handle, mgp->vso + 0x14);
4893 cmn_err(CE_WARN, "%s NIC rebooted 0x%x\n", mgp->name, reboot);
4897 cmn_err(CE_WARN, "%s: not resetting\n", mgp->name);
4901 myri10ge_stop_locked(mgp);
4902 err = myri10ge_start_locked(mgp);
4906 mac_tx_update(mgp->mh);
4923 struct myri10ge_priv *mgp;
4930 mgp = arg;
4931 mutex_enter(&mgp->intrlock);
4932 if (mgp->running != MYRI10GE_ETH_RUNNING) {
4935 mgp->name, mgp->running);
4936 mutex_exit(&mgp->intrlock);
4940 rx_pause = ntohl(mgp->ss[0].fw_stats->dropped_pause);
4948 for (slices_stalled = 0, i = 0; i < mgp->num_slices; i++) {
4949 tx = &mgp->ss[i].tx;
4956 if (mgp->watchdog_rx_pause == rx_pause) {
4959 mgp->name, i, tx->sched, tx->stall,
4961 (int)ntohl(mgp->ss[i].fw_stats->send_done_count));
4962 nic_ok = myri10ge_reset_nic(mgp);
4966 mgp->name);
4972 "%s Nic dead, not rearming watchdog\n", mgp->name);
4973 mutex_exit(&mgp->intrlock);
4976 for (i = 0; i < mgp->num_slices; i++) {
4977 ss = &mgp->ss[i];
4997 mgp->watchdog_rx_pause = rx_pause;
4999 mgp->timer_id = timeout(myri10ge_watchdog, mgp,
5000 mgp->timer_ticks);
5001 mutex_exit(&mgp->intrlock);
5009 struct myri10ge_priv *mgp = (struct myri10ge_priv *)(void *)cp;
5010 (void) mi_mpprintf(mp, "%d", mgp->intr_coal_delay);
5020 struct myri10ge_priv *mgp = (struct myri10ge_priv *)(void *)cp;
5029 mgp->intr_coal_delay = (int)new_value;
5030 *mgp->intr_coal_delay_ptr = htonl(mgp->intr_coal_delay);
5040 struct myri10ge_priv *mgp = (struct myri10ge_priv *)(void *)cp;
5041 (void) mi_mpprintf(mp, "%d", mgp->pause);
5051 struct myri10ge_priv *mgp = (struct myri10ge_priv *)(void *)cp;
5063 if (new_value != mgp->pause)
5064 err = myri10ge_change_pause(mgp, new_value);
5096 myri10ge_ndd_init(struct myri10ge_priv *mgp)
5098 mgp->nd_head = NULL;
5100 (void) nd_load(&mgp->nd_head, "myri10ge_intr_coal_delay",
5101 myri10ge_get_coalesce, myri10ge_set_coalesce, (caddr_t)mgp);
5102 (void) nd_load(&mgp->nd_head, "myri10ge_flow_control",
5103 myri10ge_get_pauseparam, myri10ge_set_pauseparam, (caddr_t)mgp);
5104 (void) nd_load(&mgp->nd_head, "myri10ge_verbose",
5106 (void) nd_load(&mgp->nd_head, "myri10ge_deassert_wait",
5109 (void) nd_load(&mgp->nd_head, "myri10ge_bigbufs_max",
5112 (void) nd_load(&mgp->nd_head, "myri10ge_lro",
5115 (void) nd_load(&mgp->nd_head, "myri10ge_lro_max_aggr",
5118 (void) nd_load(&mgp->nd_head, "myri10ge_tx_hash",
5121 (void) nd_load(&mgp->nd_head, "myri10ge_lso_copy",
5127 myri10ge_ndd_fini(struct myri10ge_priv *mgp)
5129 nd_free(&mgp->nd_head);
5136 struct myri10ge_priv *mgp = arg;
5148 ok = nd_getset(wq, mgp->nd_head, mp);
5169 struct myri10ge_priv *mgp;
5172 for (mgp = mgp_list; mgp != NULL; mgp = mgp->next) {
5173 if (unit == ddi_get_instance(mgp->dip)) {
5174 mgp->refcnt++;
5179 return (mgp);
5183 myri10ge_put_instance(struct myri10ge_priv *mgp)
5186 mgp->refcnt--;
5193 struct myri10ge_priv *mgp = arg;
5208 cap_rings->mr_rnum = mgp->num_slices;
5215 cap_rings->mr_rnum = mgp->num_slices;
5228 if (!(mgp->features & MYRI10GE_TSO))
5244 struct myri10ge_priv *mgp = arg;
5247 mcp_irq_data_t *fw_stats = mgp->ss[0].fw_stats;
5258 for (i = 0; i < mgp->num_slices; i++) {
5259 rstat = &mgp->ss[i].rx_stats;
5266 for (i = 0; i < mgp->num_slices; i++) {
5267 rstat = &mgp->ss[i].rx_stats;
5274 for (i = 0; i < mgp->num_slices; i++) {
5275 tstat = &mgp->ss[i].tx.stats;
5282 for (i = 0; i < mgp->num_slices; i++) {
5283 tstat = &mgp->ss[i].tx.stats;
5293 for (i = 0; i < mgp->num_slices; i++) {
5294 ss = &mgp->ss[i];
5310 for (i = 0; i < mgp->num_slices; i++) {
5311 ss = &mgp->ss[i];
5319 for (i = 0; i < mgp->num_slices; i++) {
5320 rstat = &mgp->ss[i].rx_stats;
5327 for (i = 0; i < mgp->num_slices; i++) {
5328 rstat = &mgp->ss[i].rx_stats;
5335 for (i = 0; i < mgp->num_slices; i++) {
5336 tstat = &mgp->ss[i].tx.stats;
5343 for (i = 0; i < mgp->num_slices; i++) {
5344 tstat = &mgp->ss[i].tx.stats;
5361 *val = mgp->pause;
5401 struct myri10ge_priv *mgp = arg;
5417 mutex_enter(&mgp->intrlock);
5418 if (mgp->running != MYRI10GE_ETH_STOPPED) {
5420 mutex_exit(&mgp->intrlock);
5426 mutex_exit(&mgp->intrlock);
5458 myri10ge_probe_slices(struct myri10ge_priv *mgp)
5463 mgp->num_slices = 1;
5467 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd);
5469 cmn_err(CE_WARN, "%s: failed reset\n", mgp->name);
5477 cmd.data0 = mgp->max_intr_slots * sizeof (struct mcp_slot);
5478 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd);
5481 mgp->name);
5486 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES,
5491 mgp->num_slices = cmd.data0;
5501 if (mgp->num_slices > myri10ge_max_slices)
5502 mgp->num_slices = myri10ge_max_slices;
5510 while (mgp->num_slices > 1) {
5512 while (!ISP2(mgp->num_slices))
5513 mgp->num_slices--;
5514 if (mgp->num_slices == 1)
5517 status = myri10ge_add_intrs(mgp, 0);
5519 myri10ge_rem_intrs(mgp, 0);
5520 if (mgp->intr_cnt == mgp->num_slices) {
5523 mgp->num_slices);
5526 mgp->num_slices = mgp->intr_cnt;
5528 mgp->num_slices = mgp->num_slices / 2;
5533 printf("Got %d slices\n", mgp->num_slices);
5568 myri10ge_free_slices(struct myri10ge_priv *mgp)
5574 if (mgp->ss == NULL)
5577 for (i = 0; i < mgp->num_slices; i++) {
5578 ss = &mgp->ss[i];
5595 bytes = sizeof (*mgp->ss) * mgp->num_slices;
5596 kmem_free(mgp->ss, bytes);
5597 mgp->ss = NULL;
5602 myri10ge_alloc_slices(struct myri10ge_priv *mgp)
5608 bytes = sizeof (*mgp->ss) * mgp->num_slices;
5609 mgp->ss = kmem_zalloc(bytes, KM_SLEEP);
5610 if (mgp->ss == NULL)
5612 for (i = 0; i < mgp->num_slices; i++) {
5613 ss = &mgp->ss[i];
5615 ss->mgp = mgp;
5620 myri10ge_dma_alloc(mgp->dip, bytes,
5629 bytes = mgp->max_intr_slots *
5632 myri10ge_dma_alloc(mgp->dip, bytes,
5640 mutex_init(&ss->rx_lock, NULL, MUTEX_DEFAULT, mgp->icookie);
5652 myri10ge_free_slices(mgp);
5657 myri10ge_save_msi_state(struct myri10ge_priv *mgp,
5666 mgp->name);
5669 mgp->pci_saved_state.msi_ctrl =
5671 mgp->pci_saved_state.msi_addr_low =
5673 mgp->pci_saved_state.msi_addr_high =
5675 mgp->pci_saved_state.msi_data_32 =
5677 mgp->pci_saved_state.msi_data_64 =
5683 myri10ge_restore_msi_state(struct myri10ge_priv *mgp,
5692 mgp->name);
5697 mgp->pci_saved_state.msi_ctrl);
5699 mgp->pci_saved_state.msi_addr_low);
5701 mgp->pci_saved_state.msi_addr_high);
5703 mgp->pci_saved_state.msi_data_32);
5705 mgp->pci_saved_state.msi_data_64);
5711 myri10ge_save_pci_state(struct myri10ge_priv *mgp)
5713 ddi_acc_handle_t handle = mgp->cfg_hdl;
5720 mgp->pci_saved_state.base[i] =
5724 if (mgp->ddi_intr_type == DDI_INTR_TYPE_MSI)
5725 err = myri10ge_save_msi_state(mgp, handle);
5731 myri10ge_restore_pci_state(struct myri10ge_priv *mgp)
5733 ddi_acc_handle_t handle = mgp->cfg_hdl;
5740 pci_config_put32(handle, i*4, mgp->pci_saved_state.base[i]);
5743 if (mgp->ddi_intr_type == DDI_INTR_TYPE_MSI)
5744 err = myri10ge_restore_msi_state(mgp, handle);
5746 if (mgp->max_read_request_4k)
5755 struct myri10ge_priv *mgp = ddi_get_driver_private(dip);
5758 if (mgp == NULL) {
5762 if (mgp->dip != dip) {
5766 mutex_enter(&mgp->intrlock);
5767 if (mgp->running == MYRI10GE_ETH_RUNNING) {
5768 mgp->running = MYRI10GE_ETH_STOPPING;
5769 mutex_exit(&mgp->intrlock);
5770 (void) untimeout(mgp->timer_id);
5771 mutex_enter(&mgp->intrlock);
5772 myri10ge_stop_locked(mgp);
5773 mgp->running = MYRI10GE_ETH_SUSPENDED_RUNNING;
5775 status = myri10ge_save_pci_state(mgp);
5776 mutex_exit(&mgp->intrlock);
5783 struct myri10ge_priv *mgp = ddi_get_driver_private(dip);
5786 if (mgp == NULL) {
5790 if (mgp->dip != dip) {
5795 mutex_enter(&mgp->intrlock);
5796 status = myri10ge_restore_pci_state(mgp);
5798 mgp->running == MYRI10GE_ETH_SUSPENDED_RUNNING) {
5799 status = myri10ge_start_locked(mgp);
5801 mutex_exit(&mgp->intrlock);
5806 mgp->timer_id = timeout(myri10ge_watchdog, mgp,
5807 mgp->timer_ticks);
5815 struct myri10ge_priv *mgp;
5858 if ((mgp = (struct myri10ge_priv *)
5859 kmem_zalloc(sizeof (*mgp), KM_SLEEP)) == NULL) {
5862 ddi_set_driver_private(dip, mgp);
5865 (void) sprintf(mgp->name, "myri10ge%d", ddi_get_instance(dip));
5869 mgp->intr_coal_delay = myri10ge_intr_coal_delay;
5870 mgp->pause = myri10ge_flow_control;
5873 mgp->max_read_request_4k = max_read_request_4k;
5874 mgp->pcie_link_width = link_width;
5875 mgp->running = MYRI10GE_ETH_STOPPED;
5876 mgp->vso = vso;
5877 mgp->dip = dip;
5878 mgp->cfg_hdl = handle;
5880 mgp->timer_ticks = 5 * drv_usectohz(1000000); /* 5 seconds */
5884 bytes = sizeof (*mgp->cmd);
5885 mgp->cmd = (mcp_cmd_response_t *)
5889 &mgp->cmd_dma, 1, DDI_DMA_DONTWAIT);
5890 if (mgp->cmd == NULL)
5893 (void) myri10ge_reg_set(dip, &mgp->reg_set, &span, &bus_number,
5896 printf("%s at %ld:%ld:%ld attaching\n", mgp->name,
5898 status = ddi_regs_map_setup(dip, mgp->reg_set, (caddr_t *)&mgp->sram,
5900 &mgp->io_handle);
5902 cmn_err(CE_WARN, "%s: couldn't map memory space", mgp->name);
5904 mgp->name, mgp->reg_set, span, status);
5908 hdr_offset = *(uint32_t *)(void*)(mgp->sram + MCP_HEADER_PTR_OFFSET);
5912 mgp->sram_size = ntohl(*(uint32_t *)(void*)(mgp->sram + ss_offset));
5913 myri10ge_pio_copy32(mgp->eeprom_strings,
5914 (uint32_t *)(void*)((char *)mgp->sram + mgp->sram_size),
5916 (void) memset(mgp->eeprom_strings +
5919 status = myri10ge_read_mac_addr(mgp);
5924 status = myri10ge_select_firmware(mgp);
5926 cmn_err(CE_WARN, "%s: failed to load firmware\n", mgp->name);
5930 status = myri10ge_probe_slices(mgp);
5932 cmn_err(CE_WARN, "%s: failed to probe slices\n", mgp->name);
5936 status = myri10ge_alloc_slices(mgp);
5938 cmn_err(CE_WARN, "%s: failed to alloc slices\n", mgp->name);
5943 status = myri10ge_add_intrs(mgp, 1);
5946 mgp->name);
5951 mutex_init(&mgp->cmd_lock, NULL, MUTEX_DRIVER, mgp->icookie);
5952 mutex_init(&mgp->intrlock, NULL, MUTEX_DRIVER, mgp->icookie);
5955 status = myri10ge_nic_stat_init(mgp);
5958 status = myri10ge_info_init(mgp);
5967 macp->m_driver = mgp;
5969 macp->m_src_addr = mgp->mac_addr;
5978 status = mac_register(macp, &mgp->mh);
5981 mgp->name, status);
5984 myri10ge_ndd_init(mgp);
5986 printf("%s: %s, tx bndry %d, fw %s\n", mgp->name,
5987 mgp->intr_type, mgp->tx_boundary, mgp->fw_name);
5989 mgp->next = mgp_list;
5990 mgp_list = mgp;
5997 myri10ge_info_destroy(mgp);
6000 myri10ge_nic_stat_destroy(mgp);
6003 mutex_destroy(&mgp->cmd_lock);
6004 mutex_destroy(&mgp->intrlock);
6005 myri10ge_rem_intrs(mgp, 1);
6008 myri10ge_free_slices(mgp);
6011 myri10ge_dummy_rdma(mgp, 0);
6014 ddi_regs_map_free(&mgp->io_handle);
6016 myri10ge_dma_free(&mgp->cmd_dma);
6019 kmem_free(mgp, sizeof (*mgp));
6035 struct myri10ge_priv *mgp, *tmp;
6047 mgp = ddi_get_driver_private(dip);
6049 mutex_enter(&mgp->intrlock);
6051 for (i = 0; i < mgp->num_slices; i++) {
6052 myri10ge_remove_jbufs(&mgp->ss[i]);
6053 jbufs_alloced += mgp->ss[i].jpool.num_alloc;
6055 mutex_exit(&mgp->intrlock);
6058 mgp->name, jbufs_alloced);
6063 if (mgp->refcnt != 0) {
6066 mgp->name, mgp->refcnt);
6071 status = mac_unregister(mgp->mh);
6075 myri10ge_ndd_fini(mgp);
6076 myri10ge_dummy_rdma(mgp, 0);
6077 myri10ge_nic_stat_destroy(mgp);
6078 myri10ge_info_destroy(mgp);
6080 mutex_destroy(&mgp->cmd_lock);
6081 mutex_destroy(&mgp->intrlock);
6083 myri10ge_rem_intrs(mgp, 1);
6085 myri10ge_free_slices(mgp);
6086 ddi_regs_map_free(&mgp->io_handle);
6087 myri10ge_dma_free(&mgp->cmd_dma);
6088 pci_config_teardown(&mgp->cfg_hdl);
6091 if (mgp_list == mgp) {
6092 mgp_list = mgp->next;
6095 while (tmp->next != mgp && tmp->next != NULL)
6100 kmem_free(mgp, sizeof (*mgp));
6114 myri10ge_poll_down(struct myri10ge_priv *mgp)
6116 struct myri10ge_slice_state *ss = mgp->ss;
6133 if (mgp->ddi_intr_type == DDI_INTR_TYPE_FIXED) {
6135 *mgp->irq_deassert = 0;
6154 struct myri10ge_priv *mgp;
6158 mgp = ddi_get_driver_private(dip);
6159 if (mgp == NULL)
6163 if (mgp->running == MYRI10GE_ETH_STOPPED)
6167 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd);
6169 cmn_err(CE_WARN, "%s: Couldn't bring down link\n", mgp->name);
6174 down = myri10ge_poll_down(mgp);