Lines Matching +defs:val +defs:test
1459 char *test = " ";
1462 * Run a small DMA test.
1488 test = "read";
1498 test = "write";
1508 test = "read/write";
1519 test);
3806 myri10ge_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
3813 *val = ss->rx_stats.ibytes;
3817 *val = ss->rx_stats.ipackets;
3821 *val = 0;
3832 myri10ge_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
3839 *val = ss->tx.stats.obytes;
3843 *val = ss->tx.stats.opackets;
3847 *val = 0;
4372 * before trying the test with 4KB.
4395 * Run a DMA test which watches for unaligned completions and
4403 cmn_err(CE_WARN, "%s: DMA test failed: %d\n",
4646 /* test #1, sufficient for older sparc systems */
4654 /* test #2, required on Olympis where the bind is what fails */
4829 uint16_t val;
4839 val = pci_config_get16(handle, ptr + PCIE_DEVCTL);
4840 val = (val & ~PCIE_DEVCTL_MAX_READ_REQ_MASK) |
4842 pci_config_put16(handle, ptr + PCIE_DEVCTL, val);
4843 val = pci_config_get16(handle, ptr + PCIE_DEVCTL);
4844 if ((val & (PCIE_DEVCTL_MAX_READ_REQ_4096)) !=
4846 cmn_err(CE_WARN, "could not set max read req (%x)\n", val);
4856 uint16_t val;
4866 val = pci_config_get16(handle, ptr + PCIE_LINKSTS);
4867 val &= PCIE_LINKSTS_NEG_WIDTH_MASK;
4868 *link = (val >> 4);
5242 myri10ge_m_stat(void *arg, uint_t stat, uint64_t *val)
5254 *val = 10ull * 1000ull * 1000000ull;
5262 *val = tmp;
5270 *val = tmp;
5278 *val = tmp;
5286 *val = tmp;
5298 *val = tmp;
5306 *val = tmp;
5315 *val = tmp;
5323 *val = tmp;
5331 *val = tmp;
5339 *val = tmp;
5347 *val = tmp;
5351 *val = ntohl(fw_stats->dropped_overrun);
5356 *val = ntohl(fw_stats->dropped_runt);
5361 *val = mgp->pause;
5365 *val = 1;
5369 *val = LINK_DUPLEX_FULL;