Cross Reference: /illumos-gate/usr/src/uts/common/io/myri10ge/drv/myri10ge.c

Lines Matching defs:req
1628 		ss->tx.req = 0;
2552 		if ((tx->req - tx->done) < (tx->mask >> 1) &&
2564 	if (tx->req == tx->done && tx->stop != NULL) {
2570 		if (tx->req == tx->done && tx->active) {
2820 	starting_slot = tx->req;
2846 	idx = tx->req & tx->mask;
2882 	tx->req += cnt;
2945     mcp_kreq_ether_send_t *req)
2955 	avail = tx->mask - (tx->req - tx->done);
2960 	idx = tx->req & tx->mask;
2974 	req->addr_low = cp->dma.low;
2975 	req->addr_high = cp->dma.high;
2976 	req->length = htons(len);
2977 	req->pad = 0;
2978 	req->rdma_count = 1;
2982 	myri10ge_submit_req(&ss->tx, req, 1);
2999 		idx = (tx->req + i) & tx->mask;
3124 	mcp_kreq_ether_send_t *req;
3141 	avail = tx->mask - (tx->req - tx->done);
3151 	req = req_list;
3152 	idx = tx->mask & tx->req;
3167 	tx_req = tx->req;
3215 	req = req_list;
3219 	tx_req = tx->req;
3234 			tx_req = tx->req;
3260 				(req-rdma_count)->rdma_count = rdma_count + 1;
3286 				req->addr_high = high_swapped;
3287 				req->addr_low = htonl(low);
3288 				req->pseudo_hdr_offset = pseudo_hdr_offset;
3289 				req->pad = 0; /* complete solid 16-byte block */
3290 				req->rdma_count = 1;
3291 				req->cksum_offset = cksum_offset;
3292 				req->length = htons(seglen);
3293 				req->flags = flags | ((cum_len & 1) *
3302 				req++;
3303 				req->flags = 0;
3311 	(req-rdma_count)->rdma_count = (uint8_t)rdma_count;
3313 		req--;
3314 		req->flags |= MXGEFW_FLAGS_TSO_LAST;
3315 	} while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
3327  * encapsulate more than eth->tx.req - eth->tx.done, or
3337 	mcp_kreq_ether_send_t *req;
3367 	req = req_list;
3372 	avail = tx->mask - (tx->req - tx->done);
3477 			req->cksum_offset = cksum_offset;
3478 			req->pseudo_hdr_offset = pseudo_hdr_offset;
3479 			req->flags = flags;
3480 			err = myri10ge_tx_copy(ss, mp, req);
3535 					(req-rdma_count)->rdma_count =
3570 				req->addr_high = high_swapped;
3571 				req->addr_low = htonl(low);
3572 				req->pseudo_hdr_offset = pseudo_hdr_offset;
3573 				req->pad = 0; /* complete solid 16-byte block */
3574 				req->rdma_count = 1;
3575 				req->cksum_offset = cksum_offset;
3576 				req->length = htons(seglen);
3577 				req->flags = flags | ((cum_len & 1) * odd_flag);
3597 				req++;
3598 				req->flags = 0;
3608 	(req-rdma_count)->rdma_count = (uint8_t)rdma_count;
3612 			req--;
3613 			req->flags |= MXGEFW_FLAGS_TSO_LAST;
3614 		} while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
3636 	avail = tx->mask - (tx->req - tx->done);
4019 	ethstat->tx_req.value.ul = ss->tx.req;
4838 	/* set max read req to 4096 */
4846 		cmn_err(CE_WARN, "could not set max read req (%x)\n", val);
4861 		cmn_err(CE_WARN, "could not set max read req\n");
4960 			    tx->done, tx->watchdog_done, tx->req, tx->pkt_done,
4980 		tx->watchdog_req = tx->req;