Lines Matching refs:idx
2776 int len, idx = -1;
2793 idx = 0;
2796 idx = 1;
2799 idx = 2;
2804 idx = 3;
2807 idx = 4;
2810 if (idx == -1) /* Ignore other results. */
2814 if (sc->calibcmd[idx].buf != NULL)
2815 kmem_free(sc->calibcmd[idx].buf, sc->calibcmd[idx].len);
2816 sc->calibcmd[idx].buf = kmem_zalloc(len, KM_NOSLEEP);
2817 if (sc->calibcmd[idx].buf == NULL) {
2820 sc->calibcmd[idx].len = len;
2821 memcpy(sc->calibcmd[idx].buf, calib, len);
2909 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
2925 struct iwn_tx_data *data = &ring->data[desc->idx];
2963 data = &ring->data[desc->idx];
3404 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
3408 int w_idx = qid * IWN4965_SCHED_COUNT + idx;
3414 if (idx < IWN_SCHED_WINSZ) {
3423 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
3426 int w_idx = qid * IWN5000_SCHED_COUNT + idx;
3432 if (idx < IWN_SCHED_WINSZ) {
3442 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
3444 int w_idx = qid * IWN5000_SCHED_COUNT + idx;
3450 if (idx < IWN_SCHED_WINSZ) {
3823 cmd->idx = ring->cur;
4432 cmd->idx = ring->cur;
4738 int maxchpwr, pwr, ridx, idx;
4779 idx = gain - (pwr - power) - tdiff - vdiff;
4781 idx += (int32_t)le32toh(uc->atten[grp][c]);
4784 idx += 9; /* 5GHz */
4786 idx += 5; /* CCK */
4788 /* Make sure idx stays in a valid range. */
4789 if (idx < 0)
4790 idx = 0;
4791 else if (idx > IWN4965_MAX_PWR_INDEX)
4792 idx = IWN4965_MAX_PWR_INDEX;
4795 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
4797 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
6401 int idx, error;
6403 for (idx = 0; idx < 5; idx++) {
6404 if (sc->calibcmd[idx].buf == NULL)
6406 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
6407 sc->calibcmd[idx].len, 0);