Lines Matching defs:sc
60 ipw2200_csr_get8(struct ipw2200_softc *sc, uint32_t off)
62 return (ddi_get8(sc->sc_ioh, (uint8_t *)(sc->sc_regs + off)));
66 ipw2200_csr_get16(struct ipw2200_softc *sc, uint32_t off)
68 return (ddi_get16(sc->sc_ioh,
69 (uint16_t *)((uintptr_t)sc->sc_regs + off)));
73 ipw2200_csr_get32(struct ipw2200_softc *sc, uint32_t off)
75 return (ddi_get32(sc->sc_ioh,
76 (uint32_t *)((uintptr_t)sc->sc_regs + off)));
80 ipw2200_csr_getbuf32(struct ipw2200_softc *sc, uint32_t off,
83 ddi_rep_get32(sc->sc_ioh, buf,
84 (uint32_t *)((uintptr_t)sc->sc_regs + off),
89 ipw2200_csr_put8(struct ipw2200_softc *sc, uint32_t off,
92 ddi_put8(sc->sc_ioh, (uint8_t *)(sc->sc_regs + off), val);
96 ipw2200_csr_put16(struct ipw2200_softc *sc, uint32_t off,
99 ddi_put16(sc->sc_ioh,
100 (uint16_t *)((uintptr_t)sc->sc_regs + off), val);
104 ipw2200_csr_put32(struct ipw2200_softc *sc, uint32_t off,
107 ddi_put32(sc->sc_ioh,
108 (uint32_t *)((uintptr_t)sc->sc_regs + off), val);
112 ipw2200_imem_get8(struct ipw2200_softc *sc, uint32_t addr)
114 ipw2200_csr_put32(sc, IPW2200_CSR_INDIRECT_ADDR, addr);
115 return (ipw2200_csr_get8(sc, IPW2200_CSR_INDIRECT_DATA));
119 ipw2200_imem_get16(struct ipw2200_softc *sc,
122 ipw2200_csr_put32(sc, IPW2200_CSR_INDIRECT_ADDR, addr);
123 return (ipw2200_csr_get16(sc, IPW2200_CSR_INDIRECT_DATA));
127 ipw2200_imem_get32(struct ipw2200_softc *sc, uint32_t addr)
129 ipw2200_csr_put32(sc, IPW2200_CSR_INDIRECT_ADDR, addr);
130 return (ipw2200_csr_get32(sc, IPW2200_CSR_INDIRECT_DATA));
134 ipw2200_imem_put8(struct ipw2200_softc *sc, uint32_t addr, uint8_t val)
136 ipw2200_csr_put32(sc, IPW2200_CSR_INDIRECT_ADDR, addr);
137 ipw2200_csr_put8(sc, IPW2200_CSR_INDIRECT_DATA, val);
141 ipw2200_imem_put16(struct ipw2200_softc *sc, uint32_t addr,
144 ipw2200_csr_put32(sc, IPW2200_CSR_INDIRECT_ADDR, addr);
145 ipw2200_csr_put16(sc, IPW2200_CSR_INDIRECT_DATA, val);
149 ipw2200_imem_put32(struct ipw2200_softc *sc, uint32_t addr,
152 ipw2200_csr_put32(sc, IPW2200_CSR_INDIRECT_ADDR, addr);
153 ipw2200_csr_put32(sc, IPW2200_CSR_INDIRECT_DATA, val);
157 ipw2200_rom_control(struct ipw2200_softc *sc, uint32_t val)
159 ipw2200_imem_put32(sc, IPW2200_IMEM_EEPROM_CTL, val);
164 ipw2200_rom_get16(struct ipw2200_softc *sc, uint8_t addr)
174 ipw2200_rom_control(sc, 0);
175 ipw2200_rom_control(sc, IPW2200_EEPROM_S);
176 ipw2200_rom_control(sc, IPW2200_EEPROM_S | IPW2200_EEPROM_C);
177 ipw2200_rom_control(sc, IPW2200_EEPROM_S);
179 ipw2200_rom_control(sc, IPW2200_EEPROM_S | IPW2200_EEPROM_D);
180 ipw2200_rom_control(sc, IPW2200_EEPROM_S | IPW2200_EEPROM_D |
183 ipw2200_rom_control(sc, IPW2200_EEPROM_S | IPW2200_EEPROM_D);
184 ipw2200_rom_control(sc, IPW2200_EEPROM_S | IPW2200_EEPROM_D |
186 ipw2200_rom_control(sc, IPW2200_EEPROM_S);
187 ipw2200_rom_control(sc, IPW2200_EEPROM_S | IPW2200_EEPROM_C);
192 ipw2200_rom_control(sc, IPW2200_EEPROM_S |
194 ipw2200_rom_control(sc, IPW2200_EEPROM_S |
199 ipw2200_rom_control(sc, IPW2200_EEPROM_S);
206 ipw2200_rom_control(sc, IPW2200_EEPROM_S | IPW2200_EEPROM_C);
207 ipw2200_rom_control(sc, IPW2200_EEPROM_S);
208 tmp = ipw2200_imem_get32(sc, IPW2200_IMEM_EEPROM_CTL);
213 ipw2200_rom_control(sc, 0);
216 ipw2200_rom_control(sc, IPW2200_EEPROM_S);
217 ipw2200_rom_control(sc, 0);
218 ipw2200_rom_control(sc, IPW2200_EEPROM_C);
255 ipw2200_cache_firmware(struct ipw2200_softc *sc)
257 IPW2200_DBG(IPW2200_DBG_FW, (sc->sc_dip, CE_CONT,
261 sc->sc_fw.boot_base = ipw2200_boot_bin + sizeof (struct header);
262 sc->sc_fw.boot_size =
265 sc->sc_fw.uc_base = ipw2200_ucode_bin + sizeof (struct header);
266 sc->sc_fw.uc_size = sizeof (ipw2200_ucode_bin) - sizeof (struct header);
268 sc->sc_fw.fw_base = ipw2200_fw_bin + sizeof (struct header);
269 sc->sc_fw.fw_size = sizeof (ipw2200_fw_bin) - sizeof (struct header);
271 sc->sc_flags |= IPW2200_FLAG_FW_CACHED;
273 IPW2200_DBG(IPW2200_DBG_FW, (sc->sc_dip, CE_CONT,
275 sc->sc_fw.boot_size, sc->sc_fw.uc_size, sc->sc_fw.fw_size));
276 IPW2200_DBG(IPW2200_DBG_FW, (sc->sc_dip, CE_CONT,
284 * free kernel memory, when sc->sc_fw.bin_base & sc->sc_fw.bin_size
288 ipw2200_free_firmware(struct ipw2200_softc *sc)
290 sc->sc_flags &= ~IPW2200_FLAG_FW_CACHED;
299 ipw2200_load_uc(struct ipw2200_softc *sc, uint8_t *buf, size_t size)
304 ipw2200_csr_put32(sc, IPW2200_CSR_RST,
305 IPW2200_RST_STOP_MASTER | ipw2200_csr_get32(sc, IPW2200_CSR_RST));
307 if (ipw2200_csr_get32(sc, IPW2200_CSR_RST) &
313 IPW2200_WARN((sc->sc_dip, CE_CONT,
318 ipw2200_imem_put32(sc, 0x3000e0, 0x80000000);
320 ipw2200_csr_put32(sc, IPW2200_CSR_RST,
322 ipw2200_csr_get32(sc, IPW2200_CSR_RST));
324 ipw2200_imem_put32(sc, 0x3000e0, 0);
326 ipw2200_imem_put32(sc, IPW2200_IMEM_EVENT_CTL, 1);
328 ipw2200_imem_put32(sc, IPW2200_IMEM_EVENT_CTL, 0);
330 ipw2200_imem_put8(sc, 0x200000, 0x00);
331 ipw2200_imem_put8(sc, 0x200000, 0x40);
335 ipw2200_imem_put16(sc, 0x200010, LE_16(*w));
337 ipw2200_imem_put8(sc, 0x200000, 0x00);
338 ipw2200_imem_put8(sc, 0x200000, 0x80);
346 val = ipw2200_imem_get8(sc, 0x200000);
352 IPW2200_WARN((sc->sc_dip, CE_WARN,
358 (void) ipw2200_imem_get32(sc, 0x200004);
360 ipw2200_imem_put8(sc, 0x200000, 0x00);
369 ipw2200_load_fw(struct ipw2200_softc *sc, uint8_t *buf, size_t size)
379 ipw2200_imem_put32(sc, 0x3000a0, 0x27000);
385 err = ipw2200_dma_region_alloc(sc, &dr[cnt], MAX_DR_SIZE, DDI_DMA_READ,
392 ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_ADDR, 0x27000);
399 IPW2200_DBG(IPW2200_DBG_FW, (sc->sc_dip, CE_CONT,
409 IPW2200_WARN((sc->sc_dip, CE_WARN,
416 err = ipw2200_dma_region_alloc(sc, &dr[cnt],
438 ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_DATA, ctl);
439 ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_DATA, src);
440 ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_DATA, dst);
441 ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_DATA, sum);
451 sentinel = ipw2200_csr_get32(sc, IPW2200_CSR_AUTOINC_ADDR);
452 ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_DATA, 0);
454 IPW2200_DBG(IPW2200_DBG_FW, (sc->sc_dip, CE_CONT,
457 ipw2200_csr_put32(sc, IPW2200_CSR_RST,
459 & ipw2200_csr_get32(sc, IPW2200_CSR_RST));
461 ipw2200_imem_put32(sc, 0x3000a4, 0x540100);
464 val = ipw2200_imem_get32(sc, 0x3000d0);
470 IPW2200_WARN((sc->sc_dip, CE_WARN,
475 mutex_enter(&sc->sc_ilock);
477 ipw2200_imem_put32(sc, 0x3000a4, 0x540c00);
482 ipw2200_csr_put32(sc, IPW2200_CSR_INTR_MASK, IPW2200_INTR_MASK_ALL);
488 ipw2200_csr_put32(sc, IPW2200_CSR_RST, 0);
489 ipw2200_csr_put32(sc, IPW2200_CSR_CTL,
490 ipw2200_csr_get32(sc, IPW2200_CSR_CTL) |
496 sc->sc_fw_ok = 0;
497 while (!sc->sc_fw_ok) {
501 if (cv_reltimedwait(&sc->sc_fw_cond, &sc->sc_ilock, clk,
505 mutex_exit(&sc->sc_ilock);
507 if (!sc->sc_fw_ok) {
508 IPW2200_WARN((sc->sc_dip, CE_WARN,
519 IPW2200_WARN((sc->sc_dip, CE_WARN,