Cross Reference: /illumos-gate/usr/src/uts/common/io/ib/adapters/tavor/tavor

Lines Matching refs:num
119     uint_t num, tavor_rsrc_t *hdl);
124     uint_t num, uint_t num_align, ddi_acc_handle_t acc_handle,
178 tavor_rsrc_alloc(tavor_state_t *state, tavor_rsrc_type_t rsrc, uint_t num,
220 		status = tavor_rsrc_mbox_alloc(rsrc_pool, num, tmp_rsrc_hdl);
234 		status = tavor_rsrc_hw_entry_alloc(rsrc_pool, num, num, 0,
245 		status = tavor_rsrc_hw_entry_alloc(rsrc_pool, num, num,
255 		status = tavor_rsrc_hw_entry_alloc(rsrc_pool, num, 1, 0,
271 		status = tavor_rsrc_hw_entry_alloc(rsrc_pool, num, 1,
281 		status = tavor_rsrc_hw_entry_alloc(rsrc_pool, num, 1,
425 	uint64_t			num, size;
463 	num  =  ((uint64_t)1 << cfgprof->cp_log_num_outmbox);
468 	rsrc_pool->rsrc_pool_size = (size * num);
474 	mbox_info.mbi_num	  = num;
510 	num  =  ((uint64_t)1 << cfgprof->cp_log_num_intr_outmbox);
515 	rsrc_pool->rsrc_pool_size = (size * num);
521 	mbox_info.mbi_num	  = num;
576 	uint64_t			num, max, size, num_prealloc;
634 	num = ((uint64_t)1 << cfgprof->cp_log_num_mpt);
640 	rsrc_pool->rsrc_pool_size = (TAVOR_MPT_SIZE * num);
643 	rsrc_pool->rsrc_align	  = (TAVOR_MPT_SIZE * num);
647 	entry_info.hwi_num	  = num;
669 	num = ((uint64_t)1 << cfgprof->cp_log_num_mttseg);
675 	rsrc_pool->rsrc_pool_size = (TAVOR_MTT_SIZE * num);
678 	rsrc_pool->rsrc_align	  = (TAVOR_MTT_SIZE * num);
682 	entry_info.hwi_num	  = num;
703 	num = ((uint64_t)1 << cfgprof->cp_log_num_qp);
709 	rsrc_pool->rsrc_pool_size = (TAVOR_QPC_SIZE * num);
712 	rsrc_pool->rsrc_align	  = (TAVOR_QPC_SIZE * num);
716 	entry_info.hwi_num	  = num;
736 	num = ((uint64_t)1 << cfgprof->cp_log_num_rdb);
742 	rsrc_pool->rsrc_pool_size = (TAVOR_RDB_SIZE * num);
745 	rsrc_pool->rsrc_align	  = (TAVOR_RDB_SIZE * num);
749 	entry_info.hwi_num	  = num;
770 	num = ((uint64_t)1 << cfgprof->cp_log_num_cq);
776 	rsrc_pool->rsrc_pool_size = (TAVOR_CQC_SIZE * num);
779 	rsrc_pool->rsrc_align	  = (TAVOR_CQC_SIZE * num);
783 	entry_info.hwi_num	  = num;
808 	num = ((uint64_t)1 << cfgprof->cp_log_num_qp);
814 	rsrc_pool->rsrc_pool_size = (TAVOR_EQPC_SIZE * num);
821 	entry_info.hwi_num	  = num;
841 	num = ((uint64_t)1 << cfgprof->cp_log_num_ah);
847 	rsrc_pool->rsrc_pool_size = (TAVOR_UDAV_SIZE * num);
854 	entry_info.hwi_num	  = num;
880 	num = ((uint64_t)1 << cfgprof->cp_log_num_uar);
887 	rsrc_pool->rsrc_pool_size = (uarscr_size * num);
894 	entry_info.hwi_num	  = num;
918 	num = ((uint64_t)1 << cfgprof->cp_log_num_srq);
925 	rsrc_pool->rsrc_pool_size = (TAVOR_SRQC_SIZE * num);
928 	rsrc_pool->rsrc_align	  = (TAVOR_SRQC_SIZE * num);
932 	entry_info.hwi_num	  = num;
961 	num  =  ((uint64_t)1 << cfgprof->cp_log_num_inmbox);
966 	rsrc_pool->rsrc_pool_size = (size * num);
972 	mbox_info.mbi_num	  = num;
1008 	num  =  ((uint64_t)1 << cfgprof->cp_log_num_intr_inmbox);
1013 	rsrc_pool->rsrc_pool_size = (size * num);
1019 	mbox_info.mbi_num	  = num;
1083 	num = ((uint64_t)1 << cfgprof->cp_log_num_mcg);
1089 	rsrc_pool->rsrc_pool_size = (mcg_size * num);
1096 	entry_info.hwi_num	  = num;
1116 	num = TAVOR_NUM_EQ;
1122 	rsrc_pool->rsrc_pool_size = (TAVOR_EQC_SIZE * num);
1125 	rsrc_pool->rsrc_align	  = (TAVOR_EQC_SIZE * num);
1129 	entry_info.hwi_num	  = num;
1462 	num  = ((uint64_t)1 << cfgprof->cp_log_num_uar);
1469 	rsrc_pool->rsrc_pool_size = (num << PAGESHIFT);
1476 	entry_info.hwi_num	  = num;
2231 tavor_rsrc_mbox_alloc(tavor_rsrc_pool_info_t *pool_info, uint_t num,
2269 		hdl->tr_len = (num * pool_info->rsrc_quantum);
2291 		temp_len = (num * pool_info->rsrc_quantum);
2357 tavor_rsrc_hw_entry_alloc(tavor_rsrc_pool_info_t *pool_info, uint_t num,
2386 	hdl->tr_len = (num * pool_info->rsrc_quantum);