Cross Reference: /illumos-gate/usr/src/uts/common/io/ib/adapters/tavor/tavor

Lines Matching refs:info_p
48     ibt_qp_info_t *info_p);
50     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
52     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
54     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
56     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
60     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
62     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
64     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
69     ibt_qp_info_t *info_p, tavor_hw_qpc_t *qpc);
83     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p,
120 	if (!(TAVOR_QP_TYPE_VALID(info_p->qp_trans, qp->qp_serv_type))) {
124 		    info_p->qp_trans);
133 	 * in "info_p->qp_current_state" to a Tavor QP state.  Otherwise, we
137 	mod_state = info_p->qp_state;
146 		switch (info_p->qp_current_state) {
163 			    info_p->qp_current_state);
209 			status = tavor_qp_reset2init(state, qp, info_p);
322 			status = tavor_qp_init2rtr(state, qp, flags, info_p);
336 			status = tavor_qp_init2init(state, qp, flags, info_p);
430 			status = tavor_qp_rtr2rts(state, qp, flags, info_p);
511 			status = tavor_qp_rts2rts(state, qp, flags, info_p);
604 			status = tavor_qp_sqerr2rts(state, qp, flags, info_p);
689 			status = tavor_qp_sqd2sqd(state, qp, flags, info_p);
715 			status = tavor_qp_sqd2rts(state, qp, flags, info_p);
851     ibt_qp_info_t *info_p)
904 		ud = &info_p->qp_transport.ud;
933 		rc = &info_p->qp_transport.rc;
936 		qpc->rre = (info_p->qp_flags & IBT_CEP_RDMA_RD) ? 1 : 0;
937 		qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
938 		qpc->rae = (info_p->qp_flags & IBT_CEP_ATOMIC)  ? 1 : 0;
963 		uc = &info_p->qp_transport.uc;
969 		qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
1035     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
1060 		ud = &info_p->qp_transport.ud;
1112 		rc = &info_p->qp_transport.rc;
1157 		opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
1160 		uc = &info_p->qp_transport.uc;
1207 			qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
1260     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
1288 		ud = &info_p->qp_transport.ud;
1344 		rc = &info_p->qp_transport.rc;
1451 		opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
1513 		uc = &info_p->qp_transport.uc;
1580 			qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
1683     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
1713 		ud = &info_p->qp_transport.ud;
1729 		rc = &info_p->qp_transport.rc;
1775 		opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
1868 		uc = &info_p->qp_transport.uc;
1886 			qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
2009     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
2036 		ud = &info_p->qp_transport.ud;
2049 		rc = &info_p->qp_transport.rc;
2056 		opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
2140 		uc = &info_p->qp_transport.uc;
2149 			qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
2333     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
2360 		ud = &info_p->qp_transport.ud;
2373 		rc = &info_p->qp_transport.rc;
2380 		opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
2464 		uc = &info_p->qp_transport.uc;
2473 			qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
2596     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
2624 		ud = &info_p->qp_transport.ud;
2657 		rc = &info_p->qp_transport.rc;
2664 		opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
2894 		uc = &info_p->qp_transport.uc;
2903 			qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
3073     ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
3095 		ud = &info_p->qp_transport.ud;
3116 			qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
3393     ibt_qp_info_t *info_p, tavor_hw_qpc_t *qpc)
3398 		qpc->rre = (info_p->qp_flags & IBT_CEP_RDMA_RD) ? 1 : 0;
3403 		qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
3408 		qpc->rae = (info_p->qp_flags & IBT_CEP_ATOMIC) ? 1 : 0;