Cross Reference: /illumos-gate/usr/src/uts/common/io/ib/adapters/tavor/tavor

Lines Matching refs:state
51 static int tavor_mcg_qplist_add(tavor_state_t *state, tavor_mcghdl_t mcg,
57 static uint_t tavor_mcg_walk_mgid_hash(tavor_state_t *state,
61 static int tavor_mcg_hash_list_remove(tavor_state_t *state, uint_t curr_indx,
63 static int tavor_mcg_entry_invalidate(tavor_state_t *state,
74 tavor_ah_alloc(tavor_state_t *state, tavor_pdhdl_t pd,
97 	if (!tavor_portnum_is_valid(state, attr_p->av_port_num)) {
109 	status = tavor_rsrc_alloc(state, TAVOR_UDAV, 1, sleepflag, &udav);
121 	status = tavor_rsrc_alloc(state, TAVOR_AHHDL, 1, sleepflag, &rsrc);
141 	status = tavor_set_addr_path(state, attr_p,
145 		tavor_rsrc_free(state, &rsrc);
146 		tavor_rsrc_free(state, &udav);
152 	udav_entry.msg_sz = state->ts_cfg_profile->cp_max_mtu - 1;
166 	op.mro_bind_type = state->ts_cfg_profile->cp_iommu_bypass;
169 	status = tavor_mr_register(state, pd, &mr_attr, &mr, &op);
218 	ah->ah_sync = TAVOR_UDAV_IS_SYNC_REQ(state);
228 	tavor_rsrc_free(state, &rsrc);
230 	tavor_rsrc_free(state, &udav);
245 tavor_ah_free(tavor_state_t *state, tavor_ahhdl_t *ahhdl, uint_t sleepflag)
275 	status = tavor_mr_deregister(state, &mr, TAVOR_MR_DEREG_ALL,
298 	tavor_rsrc_free(state, &rsrc);
301 	tavor_rsrc_free(state, &udav);
317 tavor_ah_query(tavor_state_t *state, tavor_ahhdl_t ah, tavor_pdhdl_t *pd,
359 	tavor_get_addr_path(state, (tavor_hw_addr_path_t *)&udav_entry,
377 tavor_ah_modify(tavor_state_t *state, tavor_ahhdl_t ah,
389 	if (!tavor_portnum_is_valid(state, attr_p->av_port_num)) {
420 	status = tavor_set_addr_path(state, attr_p,
550 tavor_mcg_attach(tavor_state_t *state, tavor_qphdl_t qp, ib_gid_t gid,
604 	status = tavor_mgid_hash_cmd_post(state, gid.gid_prefix, gid.gid_guid,
620 	mutex_enter(&state->ts_mcglock);
621 	mcg_entry = state->ts_mcgtmp;
623 	bzero(mcg_entry, TAVOR_MCGMEM_SZ(state));
641 	end_indx = tavor_mcg_walk_mgid_hash(state, mgid_hash, gid, NULL);
642 	mcg	 = &state->ts_mcghdl[end_indx];
663 		status = tavor_mcg_qplist_add(state, mcg, mcg_entry_qplist, qp,
667 			mutex_exit(&state->ts_mcglock);
683 		status = tavor_write_mgm_cmd_post(state, mcg_entry, end_indx,
687 			mutex_exit(&state->ts_mcglock);
688 			TAVOR_WARNING(state, "failed to write MCG entry");
721 		mutex_exit(&state->ts_mcglock);
743 		status = tavor_read_mgm_cmd_post(state, mcg_entry, end_indx,
746 			mutex_exit(&state->ts_mcglock);
747 			TAVOR_WARNING(state, "failed to read MCG entry");
769 		status = tavor_mcg_qplist_add(state, mcg, mcg_entry_qplist, qp,
772 			mutex_exit(&state->ts_mcglock);
786 		status = tavor_write_mgm_cmd_post(state, mcg_entry, end_indx,
789 			mutex_exit(&state->ts_mcglock);
790 			TAVOR_WARNING(state, "failed to write MCG entry");
823 		mutex_exit(&state->ts_mcglock);
840 	status = tavor_rsrc_alloc(state, TAVOR_MCG, 1, TAVOR_NOSLEEP, &rsrc);
842 		mutex_exit(&state->ts_mcglock);
854 	newmcg = &state->ts_mcghdl[rsrc->tr_indx];
869 	status = tavor_mcg_qplist_add(state, newmcg, mcg_entry_qplist, qp,
873 		tavor_rsrc_free(state, &rsrc);
874 		mutex_exit(&state->ts_mcglock);
888 	status = tavor_write_mgm_cmd_post(state, mcg_entry, rsrc->tr_indx,
892 		tavor_rsrc_free(state, &rsrc);
893 		mutex_exit(&state->ts_mcglock);
894 		TAVOR_WARNING(state, "failed to write MCG entry");
915 	status = tavor_read_mgm_cmd_post(state, mcg_entry, end_indx,
919 		tavor_rsrc_free(state, &rsrc);
920 		mutex_exit(&state->ts_mcglock);
921 		TAVOR_WARNING(state, "failed to read MCG entry");
944 	status = tavor_write_mgm_cmd_post(state, mcg_entry, end_indx,
948 		tavor_rsrc_free(state, &rsrc);
949 		mutex_exit(&state->ts_mcglock);
950 		TAVOR_WARNING(state, "failed to write MCG entry");
959 	mcg = &state->ts_mcghdl[end_indx];
977 	mutex_exit(&state->ts_mcglock);
994 tavor_mcg_detach(tavor_state_t *state, tavor_qphdl_t qp, ib_gid_t gid,
1026 	status = tavor_mgid_hash_cmd_post(state, gid.gid_prefix, gid.gid_guid,
1041 	mutex_enter(&state->ts_mcglock);
1042 	mcg_entry = state->ts_mcgtmp;
1054 	end_indx = tavor_mcg_walk_mgid_hash(state, mgid_hash, gid, &prev_indx);
1055 	mcg	 = &state->ts_mcghdl[end_indx];
1066 		mutex_exit(&state->ts_mcglock);
1078 	status = tavor_read_mgm_cmd_post(state, mcg_entry, end_indx,
1081 		mutex_exit(&state->ts_mcglock);
1082 		TAVOR_WARNING(state, "failed to read MCG entry");
1099 		mutex_exit(&state->ts_mcglock);
1124 		status = tavor_mcg_hash_list_remove(state, end_indx, prev_indx,
1127 			mutex_exit(&state->ts_mcglock);
1142 		status = tavor_write_mgm_cmd_post(state, mcg_entry, end_indx,
1145 			mutex_exit(&state->ts_mcglock);
1146 			TAVOR_WARNING(state, "failed to write MCG entry");
1158 	mutex_exit(&state->ts_mcglock);
1200 tavor_mcg_qplist_add(tavor_state_t *state, tavor_mcghdl_t mcg,
1208 	ASSERT(MUTEX_HELD(&state->ts_mcglock));
1216 	if (qplist_indx >= state->ts_cfg_profile->cp_num_qp_per_mcg) {
1305 tavor_mcg_walk_mgid_hash(tavor_state_t *state, uint64_t start_indx,
1313 	ASSERT(MUTEX_HELD(&state->ts_mcglock));
1318 	curr_mcghdl = &state->ts_mcghdl[curr_indx];
1336 		curr_mcghdl = &state->ts_mcghdl[curr_indx];
1395 tavor_mcg_hash_list_remove(tavor_state_t *state, uint_t curr_indx,
1403 	curr_mcg = &state->ts_mcghdl[curr_indx];
1423 			status = tavor_mcg_entry_invalidate(state, mcg_entry,
1434 		next_mcg = &state->ts_mcghdl[next_indx];
1442 		status = tavor_read_mgm_cmd_post(state, mcg_entry, next_indx,
1445 			TAVOR_WARNING(state, "failed to read MCG entry");
1467 		status = tavor_write_mgm_cmd_post(state, mcg_entry, curr_indx,
1470 			TAVOR_WARNING(state, "failed to write MCG entry");
1495 		tavor_rsrc_free(state, &curr_mcg->mcg_rsrcp);
1518 	status = tavor_read_mgm_cmd_post(state, mcg_entry, prev_indx,
1521 		TAVOR_WARNING(state, "failed to read MCG entry");
1542 	status = tavor_write_mgm_cmd_post(state, mcg_entry, prev_indx,
1545 		TAVOR_WARNING(state, "failed to write MCG entry");
1561 	prev_mcg = &state->ts_mcghdl[prev_indx];
1570 	tavor_rsrc_free(state, &curr_mcg->mcg_rsrcp);
1583 tavor_mcg_entry_invalidate(tavor_state_t *state, tavor_hw_mcg_t *mcg_entry,
1597 	bzero(mcg_entry, TAVOR_MCGMEM_SZ(state));
1598 	status = tavor_write_mgm_cmd_post(state, mcg_entry, indx,
1601 		TAVOR_WARNING(state, "failed to write MCG entry");
1713 tavor_pd_alloc(tavor_state_t *state, tavor_pdhdl_t *pdhdl, uint_t sleepflag)
1728 	status = tavor_rsrc_alloc(state, TAVOR_PDHDL, 1, sleepflag, &rsrc);
1750 tavor_pd_free(tavor_state_t *state, tavor_pdhdl_t *pdhdl)
1781 	tavor_rsrc_free(state, &rsrc);
1830 tavor_port_query(tavor_state_t *state, uint_t port, ibt_hca_portinfo_t *pi)
1844 	if (!tavor_portnum_is_valid(state, port)) {
1858 	status = tavor_getportinfo_cmd_post(state, port,
1891 	tbl_size = state->ts_cfg_profile->cp_log_max_gidtbl;
1893 	tbl_size = state->ts_cfg_profile->cp_log_max_pkeytbl;
1921 		status = tavor_getguidinfo_cmd_post(state, port, i >> 3,
1952 		status = tavor_getpkeytable_cmd_post(state, port, i,
1982 tavor_port_modify(tavor_state_t *state, uint8_t port,
2008 	if (!tavor_portnum_is_valid(state, port)) {
2023 	status = tavor_getportinfo_cmd_post(state, port,
2066 	status = tavor_set_ib_cmd_post(state, capmask, port, reset_qkey,
2069 		TAVOR_WARNING(state, "failed to modify port capabilities");
2094 tavor_set_addr_path(tavor_state_t *state, ibt_adds_vect_t *av,
2119 	if (state->ts_devlim.stat_rate_sup) {
2160 	gidtbl_sz = (1 << state->ts_devlim.log_max_gid);
2227 tavor_get_addr_path(tavor_state_t *state, tavor_hw_addr_path_t *path,
2255 		if (state->ts_devlim.stat_rate_sup) {
2290 		gidtbl_sz = (1 << state->ts_devlim.log_max_gid);
2307 tavor_portnum_is_valid(tavor_state_t *state, uint_t portnum)
2311 	max_port = state->ts_cfg_profile->cp_num_ports;
2325 tavor_pkeyindex_is_valid(tavor_state_t *state, uint_t pkeyindx)
2329 	max_pkeyindx = 1 << state->ts_cfg_profile->cp_log_max_pkeytbl;
2343 tavor_queue_alloc(tavor_state_t *state, tavor_qalloc_info_t *qa_info,
2367 	type = state->ts_cfg_profile->cp_iommu_bypass;
2373 	status = ddi_dma_alloc_handle(state->ts_dip, &dma_attr, callback, NULL,
2415 		dma_xfer_mode = state->ts_cfg_profile->cp_streaming_consistent;
2419 		    &state->ts_reg_accattr, dma_xfer_mode, callback, NULL,
2462 		    state->ts_ddrvmem, realsize, qa_info->qa_bind_align, 0, 0,
2480 		    state->ts_reg_ddr_baseaddr) + ((uintptr_t)
2481 		    qa_info->qa_buf_real - state->ts_ddr.ddr_baseaddr));
2483 		qa_info->qa_acchdl	= state->ts_reg_ddrhdl;
2506 tavor_queue_free(tavor_state_t *state, tavor_qalloc_info_t *qa_info)
2527 		vmem_xfree(state->ts_ddrvmem, qa_info->qa_buf_real,