Lines Matching refs:state
66 static int tavor_drv_init(tavor_state_t *state, dev_info_t *dip, int instance);
67 static void tavor_drv_fini(tavor_state_t *state);
68 static void tavor_drv_fini2(tavor_state_t *state);
69 static int tavor_isr_init(tavor_state_t *state);
70 static void tavor_isr_fini(tavor_state_t *state);
71 static int tavor_hw_init(tavor_state_t *state);
72 static void tavor_hw_fini(tavor_state_t *state,
74 static int tavor_soft_state_init(tavor_state_t *state);
75 static void tavor_soft_state_fini(tavor_state_t *state);
76 static int tavor_hca_port_init(tavor_state_t *state);
77 static int tavor_hca_ports_shutdown(tavor_state_t *state, uint_t num_init);
78 static void tavor_hca_config_setup(tavor_state_t *state,
80 static int tavor_internal_uarpgs_init(tavor_state_t *state);
81 static void tavor_internal_uarpgs_fini(tavor_state_t *state);
82 static int tavor_special_qp_contexts_reserve(tavor_state_t *state);
83 static void tavor_special_qp_contexts_unreserve(tavor_state_t *state);
84 static int tavor_sw_reset(tavor_state_t *state);
85 static int tavor_mcg_init(tavor_state_t *state);
86 static void tavor_mcg_fini(tavor_state_t *state);
87 static int tavor_fw_version_check(tavor_state_t *state);
88 static void tavor_device_info_report(tavor_state_t *state);
89 static void tavor_pci_capability_list(tavor_state_t *state,
91 static void tavor_pci_capability_vpd(tavor_state_t *state,
95 static void tavor_pci_capability_pcix(tavor_state_t *state,
97 static int tavor_intr_or_msi_init(tavor_state_t *state);
98 static int tavor_add_intrs(tavor_state_t *state, int intr_type);
99 static int tavor_intr_or_msi_fini(tavor_state_t *state);
276 tavor_state_t *state;
285 state = ddi_get_soft_state(tavor_statep, instance);
286 if (state == NULL) {
292 *result = (void *)state->ts_dip;
318 tavor_state_t *state;
330 state = ddi_get_soft_state(tavor_statep, instance);
331 if (state == NULL) {
391 if (!TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
393 tr_indx = state->ts_open_tr_indx++;
396 status = tavor_rsrc_alloc(state, TAVOR_UARPG, 1,
419 if (TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
420 tavor_rsrc_free(state, &rsrcp);
447 if (TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
448 tavor_rsrc_free(state, &rsrcp);
486 tavor_state_t *state;
497 state = ddi_get_soft_state(tavor_statep, instance);
498 if (state == NULL) {
561 if (TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
563 tavor_rsrc_free(state, &rsrcp);
581 tavor_state_t *state;
604 state = ddi_get_soft_state(tavor_statep, instance);
605 if (state == NULL) {
614 TAVOR_ATTACH_MSG_INIT(state->ts_attach_buf);
627 status = tavor_drv_init(state, dip, instance);
629 (TAVOR_IS_OPERATIONAL(state->ts_operational_mode))) {
639 tavor_drv_fini(state);
640 TAVOR_ATTACH_MSG(state->ts_attach_buf,
653 if (TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
657 &state->ts_ibtfinfo);
660 tavor_drv_fini(state);
663 TAVOR_ATTACH_MSG(state->ts_attach_buf,
673 TAVOR_ENABLE_IBTF_CALLB(state, tmp_ibtfpriv);
675 ibc_post_attach(state->ts_ibtfpriv);
678 status = tavor_agent_handlers_init(state);
681 TAVOR_QUIESCE_IBTF_CALLB(state);
682 if (state->ts_in_evcallb != 0) {
683 TAVOR_WARNING(state, "unable to "
688 tavor_drv_fini(state);
691 TAVOR_ATTACH_MSG(state->ts_attach_buf,
701 tavor_device_info_report(state);
704 if (!(TAVOR_IS_OPERATIONAL(state->ts_operational_mode))) {
706 "(for maintenance mode only)", state->ts_instance);
724 state->ts_attach_buf);
725 tavor_drv_fini2(state);
740 tavor_state_t *state;
748 state = ddi_get_soft_state(tavor_statep, instance);
749 if (state == NULL) {
763 if (TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
765 status = tavor_agent_handlers_fini(state);
781 ibc_status = ibc_pre_detach(state->ts_ibtfpriv, cmd);
783 status = tavor_agent_handlers_init(state);
785 TAVOR_WARNING(state, "failed to "
804 tmp_ibtfpriv = state->ts_ibtfpriv;
805 TAVOR_QUIESCE_IBTF_CALLB(state);
806 if (state->ts_in_evcallb != 0) {
807 TAVOR_WARNING(state, "unable to quiesce Tavor "
824 if (TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
826 tavor_drv_fini(state);
831 tavor_drv_fini2(state);
857 tavor_drv_init(tavor_state_t *state, dev_info_t *dip, int instance)
864 state->ts_dip = dip;
865 state->ts_instance = instance;
875 if (TAVOR_IS_HCA_MODE(state->ts_dip)) {
876 state->ts_operational_mode = TAVOR_HCA_MODE;
878 } else if (TAVOR_IS_COMPAT_MODE(state->ts_dip)) {
879 state->ts_operational_mode = TAVOR_COMPAT_MODE;
881 } else if (TAVOR_IS_MAINTENANCE_MODE(state->ts_dip)) {
882 state->ts_operational_mode = TAVOR_MAINTENANCE_MODE;
886 state->ts_operational_mode = 0; /* invalid operational mode */
887 TAVOR_WARNING(state, "unexpected device type detected");
903 status = tavor_hw_init(state);
905 state->ts_operational_mode = TAVOR_MAINTENANCE_MODE;
907 state->ts_attach_buf);
914 status = tavor_isr_init(state);
916 tavor_hw_fini(state, TAVOR_DRV_CLEANUP_ALL);
923 status = tavor_soft_state_init(state);
925 tavor_isr_fini(state);
926 tavor_hw_fini(state, TAVOR_DRV_CLEANUP_ALL);
942 tavor_drv_fini(tavor_state_t *state)
947 tavor_soft_state_fini(state);
950 tavor_isr_fini(state);
953 tavor_hw_fini(state, TAVOR_DRV_CLEANUP_ALL);
963 tavor_drv_fini2(tavor_state_t *state)
968 if (state->ts_reg_cmdhdl) {
969 ddi_regs_map_free(&state->ts_reg_cmdhdl);
970 state->ts_reg_cmdhdl = NULL;
974 if (state->ts_pci_cfghdl) {
975 pci_config_teardown(&state->ts_pci_cfghdl);
976 state->ts_pci_cfghdl = NULL;
987 tavor_isr_init(tavor_state_t *state)
996 status = ddi_intr_add_handler(state->ts_intrmsi_hdl, tavor_isr,
997 (caddr_t)state, NULL);
1010 if (state->ts_intrmsi_cap & DDI_INTR_FLAG_BLOCK) {
1011 status = ddi_intr_block_enable(&state->ts_intrmsi_hdl, 1);
1019 status = ddi_intr_enable(state->ts_intrmsi_hdl);
1032 tavor_eq_arm_all(state);
1044 tavor_isr_fini(tavor_state_t *state)
1049 if (state->ts_intrmsi_cap & DDI_INTR_FLAG_BLOCK) {
1050 (void) ddi_intr_block_disable(&state->ts_intrmsi_hdl, 1);
1052 (void) ddi_intr_disable(state->ts_intrmsi_hdl);
1058 (void) ddi_intr_remove_handler(state->ts_intrmsi_hdl);
1073 tavor_fix_error_buf(tavor_state_t *state)
1078 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, state->ts_dip,
1083 state->ts_fw.error_buf_addr -= assigned_addr[0].pci_phys_low +
1094 tavor_hw_init(tavor_state_t *state)
1109 state->ts_reg_accattr.devacc_attr_version = DDI_DEVICE_ATTR_V0;
1110 state->ts_reg_accattr.devacc_attr_endian_flags = DDI_STRUCTURE_BE_ACC;
1111 state->ts_reg_accattr.devacc_attr_dataorder = DDI_STRICTORDER_ACC;
1114 status = pci_config_setup(state->ts_dip, &state->ts_pci_cfghdl);
1116 tavor_hw_fini(state, cleanup);
1117 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1124 status = ddi_regs_map_setup(state->ts_dip, TAVOR_CMD_BAR,
1125 &state->ts_reg_cmd_baseaddr, 0, 0, &state->ts_reg_accattr,
1126 &state->ts_reg_cmdhdl);
1128 tavor_hw_fini(state, cleanup);
1130 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1137 status = ddi_regs_map_setup(state->ts_dip, TAVOR_UAR_BAR,
1138 &state->ts_reg_uar_baseaddr, 0, 0, &state->ts_reg_accattr,
1139 &state->ts_reg_uarhdl);
1141 tavor_hw_fini(state, cleanup);
1143 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1150 status = ddi_dev_regsize(state->ts_dip, TAVOR_DDR_BAR, &ddr_size);
1154 tavor_hw_fini(state, cleanup);
1157 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1176 state->ts_cfg_profile_setting = ddr_size;
1178 status = ddi_regs_map_setup(state->ts_dip, TAVOR_DDR_BAR,
1179 &state->ts_reg_ddr_baseaddr, 0, ddr_size, &state->ts_reg_accattr,
1180 &state->ts_reg_ddrhdl);
1196 status = ddi_regs_map_setup(state->ts_dip, TAVOR_DDR_BAR,
1197 &state->ts_reg_ddr_baseaddr, 0, TAVOR_DDR_SIZE_128,
1198 &state->ts_reg_accattr, &state->ts_reg_ddrhdl);
1207 state->ts_cfg_profile_setting = TAVOR_DDR_SIZE_128;
1216 tavor_hw_fini(state, cleanup);
1218 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1226 state->ts_cmd_regs.hcr = (tavor_hw_hcr_t *)
1227 ((uintptr_t)state->ts_reg_cmd_baseaddr + TAVOR_CMD_HCR_OFFSET);
1230 state->ts_cmd_regs.ecr = (uint64_t *)
1231 ((uintptr_t)state->ts_reg_cmd_baseaddr + TAVOR_CMD_ECR_OFFSET);
1232 state->ts_cmd_regs.clr_ecr = (uint64_t *)
1233 ((uintptr_t)state->ts_reg_cmd_baseaddr + TAVOR_CMD_CLR_ECR_OFFSET);
1236 state->ts_cmd_regs.sw_reset = (uint32_t *)
1237 ((uintptr_t)state->ts_reg_cmd_baseaddr + TAVOR_CMD_SW_RESET_OFFSET);
1240 state->ts_cmd_regs.clr_int = (uint64_t *)
1241 ((uintptr_t)state->ts_reg_cmd_baseaddr + TAVOR_CMD_CLR_INT_OFFSET);
1244 status = tavor_cfg_profile_init_phase1(state);
1246 tavor_hw_fini(state, cleanup);
1248 TAVOR_ATTACH_MSG(state->ts_attach_buf, "hw_init_cfginit_fail");
1254 /* Do a software reset of the Tavor HW to ensure proper state */
1255 status = tavor_sw_reset(state);
1257 tavor_hw_fini(state, cleanup);
1259 TAVOR_ATTACH_MSG(state->ts_attach_buf, "hw_init_sw_reset_fail");
1265 status = tavor_sys_en_cmd_post(state, TAVOR_CMD_SYS_EN_NORMAL,
1277 tavor_hw_fini(state, cleanup);
1280 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1288 status = tavor_rsrc_init_phase1(state);
1290 tavor_hw_fini(state, cleanup);
1292 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1300 status = tavor_cmn_query_cmd_post(state, QUERY_DDR, 0,
1301 &state->ts_ddr, sizeof (tavor_hw_queryddr_t),
1306 tavor_hw_fini(state, cleanup);
1309 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1316 status = tavor_cmn_query_cmd_post(state, QUERY_FW, 0, &state->ts_fw,
1321 tavor_hw_fini(state, cleanup);
1324 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1330 if (tavor_fix_error_buf(state) != DDI_SUCCESS) {
1331 tavor_hw_fini(state, cleanup);
1334 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1341 status = tavor_fw_version_check(state);
1343 if (state->ts_operational_mode == TAVOR_HCA_MODE) {
1350 state->ts_fw.fw_rev_major,
1351 state->ts_fw.fw_rev_minor,
1352 state->ts_fw.fw_rev_subminor);
1353 } else if (state->ts_operational_mode == TAVOR_COMPAT_MODE) {
1360 state->ts_fw.fw_rev_major,
1361 state->ts_fw.fw_rev_minor,
1362 state->ts_fw.fw_rev_subminor);
1366 state->ts_fw.fw_rev_major,
1367 state->ts_fw.fw_rev_minor,
1368 state->ts_fw.fw_rev_subminor);
1370 tavor_hw_fini(state, cleanup);
1373 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1383 status = tavor_mod_stat_cfg_cmd_post(state);
1392 tavor_hw_fini(state, cleanup);
1395 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1402 status = tavor_cmn_query_cmd_post(state, QUERY_DEV_LIM, 0,
1403 &state->ts_devlim, sizeof (tavor_hw_querydevlim_t),
1408 tavor_hw_fini(state, cleanup);
1411 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1418 status = tavor_cfg_profile_init_phase2(state);
1420 tavor_hw_fini(state, cleanup);
1422 TAVOR_ATTACH_MSG(state->ts_attach_buf, "hw_init_cfginit2_fail");
1428 status = tavor_rsrc_init_phase2(state);
1430 tavor_hw_fini(state, cleanup);
1432 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1440 status = tavor_cmn_query_cmd_post(state, QUERY_ADAPTER, 0,
1441 &state->ts_adapter, sizeof (tavor_hw_queryadapter_t),
1446 tavor_hw_fini(state, cleanup);
1449 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1456 tavor_hca_config_setup(state, &state->ts_hcaparams);
1459 status = tavor_init_hca_cmd_post(state, &state->ts_hcaparams,
1464 tavor_hw_fini(state, cleanup);
1467 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1475 status = tavor_pd_alloc(state, &state->ts_pdhdl_internal, TAVOR_SLEEP);
1477 tavor_hw_fini(state, cleanup);
1480 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1488 status = tavor_internal_uarpgs_init(state);
1490 tavor_hw_fini(state, cleanup);
1493 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1501 status = tavor_intr_or_msi_init(state);
1503 tavor_hw_fini(state, cleanup);
1506 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1514 status = tavor_eq_init_all(state);
1516 tavor_hw_fini(state, cleanup);
1518 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1526 status = tavor_special_qp_contexts_reserve(state);
1528 tavor_hw_fini(state, cleanup);
1531 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1539 status = tavor_mcg_init(state);
1541 tavor_hw_fini(state, cleanup);
1543 TAVOR_ATTACH_MSG(state->ts_attach_buf, "hw_init_mcg_init_fail");
1550 status = tavor_hca_port_init(state);
1552 tavor_hw_fini(state, cleanup);
1555 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1563 status = tavor_getnodeinfo_cmd_post(state, TAVOR_CMD_NOSLEEP_SPIN,
1568 tavor_hw_fini(state, cleanup);
1571 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1585 if (state->ts_cfg_profile->cp_nodeguid) {
1586 state->ts_nodeguid = state->ts_cfg_profile->cp_nodeguid;
1588 state->ts_nodeguid = nodeinfo.NodeGUID;
1591 if (state->ts_nodeguid != nodeinfo.NodeGUID) {
1604 if (state->ts_cfg_profile->cp_sysimgguid) {
1605 state->ts_sysimgguid = state->ts_cfg_profile->cp_sysimgguid;
1607 state->ts_sysimgguid = nodeinfo.SystemImageGUID;
1610 if (state->ts_sysimgguid != nodeinfo.SystemImageGUID) {
1616 status = tavor_getnodedesc_cmd_post(state, TAVOR_CMD_NOSLEEP_SPIN,
1617 (sm_nodedesc_t *)&state->ts_nodedesc);
1621 tavor_hw_fini(state, cleanup);
1624 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1640 tavor_hw_fini(tavor_state_t *state, tavor_drv_cleanup_level_t cleanup)
1655 num_ports = state->ts_cfg_profile->cp_num_ports;
1656 (void) tavor_hca_ports_shutdown(state, num_ports);
1661 tavor_mcg_fini(state);
1666 tavor_special_qp_contexts_unreserve(state);
1675 status = tavor_eq_fini_all(state);
1677 TAVOR_WARNING(state, "failed to teardown EQs");
1686 status = tavor_intr_or_msi_fini(state);
1688 TAVOR_WARNING(state, "failed to free intr/MSI");
1698 tavor_internal_uarpgs_fini(state);
1707 status = tavor_pd_free(state, &state->ts_pdhdl_internal);
1709 TAVOR_WARNING(state, "failed to free internal PD");
1723 status = tavor_close_hca_cmd_post(state,
1726 TAVOR_WARNING(state, "failed to shutdown HCA");
1736 tavor_rsrc_fini(state, TAVOR_RSRC_CLEANUP_ALL);
1741 tavor_rsrc_fini(state, TAVOR_RSRC_CLEANUP_PHASE1_COMPLETE);
1751 status = tavor_sys_dis_cmd_post(state, TAVOR_CMD_NOSLEEP_SPIN);
1753 TAVOR_WARNING(state, "failed to shutdown hardware");
1763 tavor_cfg_profile_fini(state);
1767 ddi_regs_map_free(&state->ts_reg_ddrhdl);
1771 ddi_regs_map_free(&state->ts_reg_uarhdl);
1783 TAVOR_WARNING(state, "unexpected driver cleanup level");
1798 tavor_soft_state_init(tavor_state_t *state)
1813 state->ts_ibtfinfo.hca_ci_vers = IBCI_V4;
1814 state->ts_ibtfinfo.hca_handle = (ibc_hca_hdl_t)state;
1815 state->ts_ibtfinfo.hca_ops = &tavor_ibc_ops;
1818 state->ts_ibtfinfo.hca_attr = hca_attr;
1820 hca_attr->hca_dip = state->ts_dip;
1821 hca_attr->hca_fw_major_version = state->ts_fw.fw_rev_major;
1822 hca_attr->hca_fw_minor_version = state->ts_fw.fw_rev_minor;
1823 hca_attr->hca_fw_micro_version = state->ts_fw.fw_rev_subminor;
1836 if (state->ts_devlim.ud_multi) {
1839 if (state->ts_devlim.atomic) {
1842 if (state->ts_devlim.apm) {
1845 if (state->ts_devlim.pkey_v) {
1848 if (state->ts_devlim.qkey_v) {
1851 if (state->ts_cfg_profile->cp_srq_enable) {
1861 hca_attr->hca_vendor_id = state->ts_adapter.vendor_id;
1862 hca_attr->hca_device_id = state->ts_adapter.device_id;
1863 hca_attr->hca_version_id = state->ts_adapter.rev_id;
1871 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_qp);
1873 state->ts_devlim.log_rsvd_qp);
1874 maxval = ((uint64_t)1 << state->ts_devlim.log_max_qp_sz);
1875 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_max_qp_sz);
1881 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1889 maxval = state->ts_devlim.max_sg;
1890 val = state->ts_cfg_profile->cp_wqe_max_sgl;
1896 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1902 if (state->ts_cfg_profile->cp_wqe_real_max_sgl > maxval) {
1903 state->ts_cfg_profile->cp_wqe_real_max_sgl = maxval;
1906 val = state->ts_cfg_profile->cp_wqe_real_max_sgl;
1918 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_cq);
1920 state->ts_devlim.log_rsvd_cq);
1921 maxval = ((uint64_t)1 << state->ts_devlim.log_max_cq_sz);
1922 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_max_cq_sz) - 1;
1928 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1941 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_srq);
1943 state->ts_devlim.log_rsvd_srq);
1944 maxval = ((uint64_t)1 << state->ts_devlim.log_max_srq_sz);
1945 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_max_srq_sz);
1952 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1959 val = state->ts_cfg_profile->cp_srq_max_sgl;
1960 maxval = state->ts_devlim.max_sg;
1966 TAVOR_ATTACH_MSG(state->ts_attach_buf,
1988 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_mpt);
1990 state->ts_devlim.log_rsvd_mpt);
1992 state->ts_devlim.log_rsvd_mpt);
1993 maxval = state->ts_devlim.log_max_mrw_sz;
1994 val = state->ts_cfg_profile->cp_log_max_mrw_sz;
2000 TAVOR_ATTACH_MSG(state->ts_attach_buf,
2008 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_rdb);
2010 val = state->ts_cfg_profile->cp_hca_max_rdma_in_qp;
2012 val = state->ts_cfg_profile->cp_hca_max_rdma_out_qp;
2025 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_qp);
2027 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_mcg);
2029 val = state->ts_cfg_profile->cp_num_qp_per_mcg;
2033 maxval = ((uint64_t)1 << state->ts_devlim.log_max_pkey);
2034 val = ((uint64_t)state->ts_cfg_profile->cp_num_ports <<
2035 state->ts_cfg_profile->cp_log_max_pkeytbl);
2042 TAVOR_ATTACH_MSG(state->ts_attach_buf,
2050 maxval = state->ts_devlim.num_ports;
2051 val = state->ts_cfg_profile->cp_num_ports;
2057 TAVOR_ATTACH_MSG(state->ts_attach_buf,
2065 hca_attr->hca_node_guid = state->ts_nodeguid;
2066 hca_attr->hca_si_guid = state->ts_sysimgguid;
2072 hca_attr->hca_local_ack_delay = state->ts_devlim.ca_ack_delay;
2075 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_max_gidtbl);
2077 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_max_pkeytbl);
2081 maxval = ((uint64_t)1 << state->ts_devlim.log_max_pd);
2082 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_pd);
2088 TAVOR_ATTACH_MSG(state->ts_attach_buf,
2096 maxval = ((uint64_t)1 << state->ts_devlim.log_max_av);
2097 val = ((uint64_t)1 << state->ts_cfg_profile->cp_log_num_ah);
2103 TAVOR_ATTACH_MSG(state->ts_attach_buf,
2115 mutex_init(&state->ts_uar_lock, NULL, MUTEX_DRIVER,
2116 DDI_INTR_PRI(state->ts_intrmsi_pri));
2119 state->ts_fw_flashstarted = 0;
2120 mutex_init(&state->ts_fw_flashlock, NULL, MUTEX_DRIVER,
2121 DDI_INTR_PRI(state->ts_intrmsi_pri));
2124 mutex_init(&state->ts_info_lock, NULL, MUTEX_DRIVER,
2125 DDI_INTR_PRI(state->ts_intrmsi_pri));
2128 tavor_qpn_avl_init(state);
2131 status = tavor_kstat_init(state);
2133 tavor_qpn_avl_fini(state);
2134 mutex_destroy(&state->ts_info_lock);
2135 mutex_destroy(&state->ts_fw_flashlock);
2136 mutex_destroy(&state->ts_uar_lock);
2140 TAVOR_ATTACH_MSG(state->ts_attach_buf,
2156 tavor_soft_state_fini(tavor_state_t *state)
2161 tavor_kstat_fini(state);
2164 tavor_qpn_avl_fini(state);
2167 mutex_destroy(&state->ts_info_lock);
2170 mutex_destroy(&state->ts_fw_flashlock);
2173 mutex_destroy(&state->ts_uar_lock);
2176 kmem_free(state->ts_ibtfinfo.hca_attr, sizeof (ibt_hca_attr_t));
2187 tavor_hca_config_setup(tavor_state_t *state,
2207 ddr_baseaddr = (uint64_t)(uintptr_t)state->ts_reg_ddr_baseaddr;
2208 ddr_base_map_addr = (uint64_t)state->ts_ddr.ddr_baseaddr;
2211 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_QPC];
2216 inithca->context.log_num_qp = state->ts_cfg_profile->cp_log_num_qp;
2224 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_CQC];
2229 inithca->context.log_num_cq = state->ts_cfg_profile->cp_log_num_cq;
2232 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_SRQC];
2238 state->ts_cfg_profile->cp_log_num_srq;
2241 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_EQPC];
2250 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_EQC];
2258 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_RDB];
2265 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_MCG];
2269 mcg_size = TAVOR_MCGMEM_SZ(state);
2272 (1 << state->ts_cfg_profile->cp_log_num_mcg_hash);
2274 inithca->multi.log_mc_tbl_sz = state->ts_cfg_profile->cp_log_num_mcg;
2278 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_MPT];
2283 inithca->tpt.log_mpt_sz = state->ts_cfg_profile->cp_log_num_mpt;
2286 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_MTT];
2292 rsrc_pool = &state->ts_rsrc_hdl[TAVOR_UAR_SCR];
2308 tavor_hca_port_init(tavor_state_t *state)
2319 cfgprof = state->ts_cfg_profile;
2363 maxval = state->ts_devlim.max_mtu;
2376 maxval = state->ts_devlim.max_port_width;
2389 maxval = state->ts_devlim.max_vl;
2402 maxval = ((uint64_t)1 << state->ts_devlim.log_max_gid);
2415 maxval = ((uint64_t)1 << state->ts_devlim.log_max_pkey);
2432 status = tavor_init_ib_cmd_post(state, initib, i + 1,
2456 (void) tavor_hca_ports_shutdown(state, i);
2468 tavor_hca_ports_shutdown(tavor_state_t *state, uint_t num_init)
2483 status = tavor_close_ib_cmd_post(state, i + 1,
2486 TAVOR_WARNING(state, "failed to shutdown HCA port");
2506 tavor_internal_uarpgs_init(tavor_state_t *state)
2516 status = tavor_rsrc_alloc(state, TAVOR_UARPG, 1, TAVOR_SLEEP,
2517 &state->ts_uarpg0_rsrc_rsrvd);
2529 status = tavor_rsrc_alloc(state, TAVOR_UARPG, 1, TAVOR_SLEEP,
2530 &state->ts_uarpg1_rsrc);
2532 tavor_rsrc_free(state, &state->ts_uarpg0_rsrc_rsrvd);
2539 state->ts_uar = (tavor_hw_uar_t *)state->ts_uarpg1_rsrc->tr_addr;
2551 tavor_internal_uarpgs_fini(tavor_state_t *state)
2556 tavor_rsrc_free(state, &state->ts_uarpg1_rsrc);
2559 tavor_rsrc_free(state, &state->ts_uarpg0_rsrc_rsrvd);
2570 tavor_special_qp_contexts_reserve(tavor_state_t *state)
2578 mutex_init(&state->ts_spec_qplock, NULL, MUTEX_DRIVER,
2579 DDI_INTR_PRI(state->ts_intrmsi_pri));
2587 status = tavor_rsrc_alloc(state, TAVOR_QPC, 2, TAVOR_SLEEP, &qp0_rsrc);
2589 mutex_destroy(&state->ts_spec_qplock);
2595 state->ts_spec_qp0 = qp0_rsrc;
2603 status = tavor_rsrc_alloc(state, TAVOR_QPC, 2, TAVOR_SLEEP, &qp1_rsrc);
2605 tavor_rsrc_free(state, &qp0_rsrc);
2606 mutex_destroy(&state->ts_spec_qplock);
2612 state->ts_spec_qp1 = qp1_rsrc;
2624 tavor_special_qp_contexts_unreserve(tavor_state_t *state)
2629 tavor_rsrc_free(state, &state->ts_spec_qp1);
2632 tavor_rsrc_free(state, &state->ts_spec_qp0);
2635 mutex_destroy(&state->ts_spec_qplock);
2646 tavor_sw_reset(tavor_state_t *state)
2649 ddi_acc_handle_t hdl = state->ts_pci_cfghdl, phdl;
2659 reset_delay = state->ts_cfg_profile->cp_sw_reset_delay;
2671 dip = state->ts_dip;
2675 tavor_pci_capability_list(state, hdl);
2685 state->ts_cfg_data[i] = pci_config_get32(hdl, i << 2);
2709 state->ts_cfg_pdata[i] =
2718 ddi_put32(state->ts_reg_cmdhdl, state->ts_cmd_regs.sw_reset,
2747 state->ts_cfg_pdata[i]);
2778 pci_config_put32(hdl, i << 2, state->ts_cfg_data[i]);
2792 tavor_mcg_init(tavor_state_t *state)
2802 mcg_tmp_sz = TAVOR_MCGMEM_SZ(state);
2803 state->ts_mcgtmp = kmem_zalloc(mcg_tmp_sz, KM_SLEEP);
2810 mutex_init(&state->ts_mcglock, NULL, MUTEX_DRIVER,
2811 DDI_INTR_PRI(state->ts_intrmsi_pri));
2823 tavor_mcg_fini(tavor_state_t *state)
2830 mcg_tmp_sz = TAVOR_MCGMEM_SZ(state);
2831 kmem_free(state->ts_mcgtmp, mcg_tmp_sz);
2834 mutex_destroy(&state->ts_mcglock);
2845 tavor_fw_version_check(tavor_state_t *state)
2857 switch (state->ts_operational_mode) {
2879 if (state->ts_fw.fw_rev_major < tavor_fw_ver_major) {
2881 } else if (state->ts_fw.fw_rev_major > tavor_fw_ver_major) {
2888 if (state->ts_fw.fw_rev_minor < tavor_fw_ver_minor) {
2890 } else if (state->ts_fw.fw_rev_minor > tavor_fw_ver_minor) {
2899 if (state->ts_fw.fw_rev_subminor < tavor_fw_ver_subminor) {
2901 } else if (state->ts_fw.fw_rev_subminor > tavor_fw_ver_subminor) {
2914 tavor_device_info_report(tavor_state_t *state)
2917 "HW rev: %02x\n", state->ts_instance, state->ts_fw.fw_rev_major,
2918 state->ts_fw.fw_rev_minor, state->ts_fw.fw_rev_subminor,
2919 state->ts_adapter.rev_id);
2921 state->ts_instance, state->ts_nodedesc, state->ts_nodeguid);
2930 tavor_pci_capability_list(tavor_state_t *state, ddi_acc_handle_t hdl)
2969 tavor_pci_capability_vpd(state, hdl, offset);
2972 tavor_pci_capability_pcix(state, hdl, offset);
3032 tavor_pci_capability_vpd(tavor_state_t *state, ddi_acc_handle_t hdl,
3082 if (name_length > sizeof (state->ts_hca_name)) {
3087 (void) memcpy(state->ts_hca_name, &vpd.vpd_char[vpd_str_id + 3],
3089 state->ts_hca_name[name_length] = 0;
3105 if (pn_length > sizeof (state->ts_hca_pn)) {
3110 (void) memcpy(state->ts_hca_pn,
3113 state->ts_hca_pn[pn_length] = 0;
3114 state->ts_hca_pn_len = pn_length;
3124 state->ts_hca_pn_len = 0;
3134 tavor_pci_capability_pcix(tavor_state_t *state, ddi_acc_handle_t hdl,
3158 max_out_splt_trans = ddi_prop_get_int(DDI_DEV_T_ANY, state->ts_dip,
3165 " (%d), using default value (%d)\n", state->ts_instance,
3167 state->ts_cfg_profile->cp_max_out_splt_trans);
3169 state->ts_cfg_profile->cp_max_out_splt_trans;
3172 state->ts_cfg_profile->cp_max_out_splt_trans;
3196 max_mem_rd_byte_cnt = ddi_prop_get_int(DDI_DEV_T_ANY, state->ts_dip,
3203 " (%d), using default value (%d)\n", state->ts_instance,
3205 state->ts_cfg_profile->cp_max_mem_rd_byte_cnt);
3207 state->ts_cfg_profile->cp_max_mem_rd_byte_cnt;
3210 state->ts_cfg_profile->cp_max_mem_rd_byte_cnt;
3241 tavor_intr_or_msi_init(tavor_state_t *state)
3248 status = ddi_intr_get_supported_types(state->ts_dip,
3249 &state->ts_intr_types_avail);
3265 if ((state->ts_cfg_profile->cp_use_msi_if_avail != 0) &&
3266 (state->ts_intr_types_avail & DDI_INTR_TYPE_MSI)) {
3267 status = tavor_add_intrs(state, DDI_INTR_TYPE_MSI);
3269 state->ts_intr_type_chosen = DDI_INTR_TYPE_MSI;
3279 if (state->ts_intr_types_avail & DDI_INTR_TYPE_FIXED) {
3280 status = tavor_add_intrs(state, DDI_INTR_TYPE_FIXED);
3282 state->ts_intr_type_chosen = DDI_INTR_TYPE_FIXED;
3300 tavor_add_intrs(tavor_state_t *state, int intr_type)
3307 status = ddi_intr_get_nintrs(state->ts_dip, intr_type,
3308 &state->ts_intrmsi_count);
3317 status = ddi_intr_get_navail(state->ts_dip, intr_type,
3318 &state->ts_intrmsi_avail);
3327 if ((state->ts_intrmsi_avail < 1) || (state->ts_intrmsi_count < 1)) {
3335 status = ddi_intr_alloc(state->ts_dip, &state->ts_intrmsi_hdl,
3336 intr_type, 0, 1, &state->ts_intrmsi_allocd,
3346 if (state->ts_intrmsi_allocd < 1) {
3357 status = ddi_intr_get_pri(state->ts_intrmsi_hdl,
3358 &state->ts_intrmsi_pri);
3361 (void) ddi_intr_free(state->ts_intrmsi_hdl);
3370 if (state->ts_intrmsi_pri >= ddi_intr_get_hilevel_pri()) {
3372 (void) ddi_intr_free(state->ts_intrmsi_hdl);
3381 status = ddi_intr_get_cap(state->ts_intrmsi_hdl,
3382 &state->ts_intrmsi_cap);
3385 (void) ddi_intr_free(state->ts_intrmsi_hdl);
3403 tavor_intr_or_msi_fini(tavor_state_t *state)
3410 status = ddi_intr_free(state->ts_intrmsi_hdl);
3425 tavor_intr_disable(tavor_state_t *state)
3428 ddi_acc_handle_t pci_cfg_hdl = state->ts_pci_cfghdl;
3430 ASSERT(state->ts_intr_types_avail &
3438 if ((state->ts_cfg_profile->cp_use_msi_if_avail != 0) &&
3439 (state->ts_intr_types_avail & DDI_INTR_TYPE_MSI)) {
3468 ASSERT(state->ts_intr_types_avail & DDI_INTR_TYPE_FIXED);
3482 tavor_state_t *state = ddi_get_soft_state(tavor_statep,
3484 ASSERT(state != NULL);
3487 state->ts_quiescing = B_TRUE;
3490 if (!TAVOR_IS_OPERATIONAL(state->ts_operational_mode)) {
3495 if (tavor_hca_ports_shutdown(state,
3496 state->ts_cfg_profile->cp_num_ports) != TAVOR_CMD_SUCCESS) {
3497 state->ts_quiescing = B_FALSE;
3502 if (tavor_close_hca_cmd_post(state, TAVOR_CMD_NOSLEEP_SPIN) !=
3504 state->ts_quiescing = B_FALSE;
3509 if (tavor_sys_dis_cmd_post(state, TAVOR_CMD_NOSLEEP_SPIN) !=
3511 state->ts_quiescing = B_FALSE;
3516 if (tavor_intr_disable(state) != DDI_SUCCESS) {
3517 state->ts_quiescing = B_FALSE;
3522 if (tavor_sw_reset(state) != DDI_SUCCESS) {
3523 state->ts_quiescing = B_FALSE;