Lines Matching defs:tmp
256 uint64_t tmp;
278 tmp = (uint64_t)pkt_len;
279 hdrp->value |= (tmp << TX_PKT_HEADER_TOT_XFER_LEN_SHIFT);
283 tmp = (uint64_t)npads;
284 hdrp->value |= (tmp << TX_PKT_HEADER_PAD_SHIFT);
303 tmp = 1ull;
304 hdrp->value |= (tmp << TX_PKT_HEADER_LLC_SHIFT);
318 tmp = 1ull;
319 hdrp->value |= (tmp << TX_PKT_HEADER_VLAN__SHIFT);
368 tmp = (uint64_t)iph_len;
369 hdrp->value |= (tmp << TX_PKT_HEADER_IHL_SHIFT);
370 tmp = (uint64_t)(eth_hdr_size >> 1);
371 hdrp->value |= (tmp << TX_PKT_HEADER_L3START_SHIFT);
375 "tmp 0x%x", iph_len, hdrp->bits.l3start, eth_hdr_size,
376 ipproto, tmp));
395 tmp = 1ull;
396 hdrp->value |= (tmp << TX_PKT_HEADER_IP_VER_SHIFT);
398 tmp = (eth_hdr_size >> 1);
399 hdrp->value |= (tmp << TX_PKT_HEADER_L3START_SHIFT);
421 tmp = 1ull;
422 hdrp->value |= (tmp << TX_PKT_HEADER_PKT_TYPE_SHIFT);
434 tmp = 0x2ull;
435 hdrp->value |= (tmp << TX_PKT_HEADER_PKT_TYPE_SHIFT);
485 p_mblk_t nmp, bmp, tmp;
557 if ((tmp = dupb(nmp)) == NULL) {
560 tmp->b_rptr = b_wptr;
561 tmp->b_wptr = nmp->b_wptr;
562 tmp->b_cont = nmp->b_cont;
563 nmp->b_cont = tmp;
566 nmp = tmp;
569 nmp = tmp;
583 if ((tmp = msgpullup(nmp->b_cont, -1)) == NULL) {
587 nmp->b_cont = tmp;
2088 uint64_t tmp;
2116 tmp = (0x1ULL << 30) | i;
2117 HXGE_REG_WR64(hxgep->hpi_handle, TDC_REORD_TBL_CMD, tmp);
2122 tmp = 0;
2125 &tmp);
2126 } while (((tmp >> 31) & 0x1ULL) == 0x0);
2133 tmp = (0x1ULL << 30) | i;
2134 HXGE_REG_WR64(hxgep->hpi_handle, TDC_REORD_TBL_CMD, tmp);
2139 tmp = 0;
2142 &tmp);
2143 } while (((tmp >> 31) & 0x1ULL) == 0x0);
2145 HXGE_REG_RD64(hxgep->hpi_handle, TDC_REORD_TBL_DATA_HI, &tmp);
2146 if (0x1ff00ULL != (0x1ffffULL & tmp)) {
2149 i, (unsigned long long)tmp));
2153 HXGE_REG_RD64(hxgep->hpi_handle, TDC_REORD_TBL_DATA_LO, &tmp);
2154 if (tmp != 0) {
2160 HXGE_REG_RD64(hxgep->hpi_handle, TDC_FIFO_ERR_STAT, &tmp);
2161 if (tmp != 0) {
2164 i, (unsigned long long)tmp));
2168 HXGE_REG_RD64(hxgep->hpi_handle, TDC_FIFO_ERR_STAT, &tmp);
2169 if (tmp != 0) {