Lines Matching defs:hxgep
69 int hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *,
71 int hxge_param_rx_intr_time(p_hxge_t hxgep, queue_t *,
75 static int hxge_param_set_ether_usr(p_hxge_t hxgep, queue_t *, mblk_t *,
77 int hxge_param_set_ip_opt(p_hxge_t hxgep,
79 static int hxge_param_pfc_hash_init(p_hxge_t hxgep,
81 static int hxge_param_tcam_enable(p_hxge_t hxgep, queue_t *,
83 static int hxge_param_get_rxdma_info(p_hxge_t hxgep, queue_t *q,
85 static int hxge_param_set_vlan_ids(p_hxge_t hxgep, queue_t *q,
87 static int hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q,
89 int hxge_param_get_ip_opt(p_hxge_t hxgep,
91 static int hxge_param_get_mac(p_hxge_t hxgep, queue_t *q, p_mblk_t mp,
93 static int hxge_param_get_debug_flag(p_hxge_t hxgep, queue_t *q,
95 static int hxge_param_set_hxge_debug_flag(p_hxge_t hxgep,
97 static int hxge_param_set_hpi_debug_flag(p_hxge_t hxgep,
99 static int hxge_param_dump_ptrs(p_hxge_t hxgep, queue_t *q,
228 hxge_get_param_soft_properties(p_hxge_t hxgep)
236 HXGE_DEBUG_MSG((hxgep, DDI_CTL, " ==> hxge_get_param_soft_properties"));
238 param_arr = hxgep->param_arr;
239 param_count = hxgep->param_count;
252 hxgep->dip, 0, param_arr[i].fcode_name,
277 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, hxgep->dip, 0,
285 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, hxgep->dip, 0,
297 hxge_private_param_register(p_hxge_t hxgep, p_hxge_param_t param_arr)
305 HXGE_DEBUG_MSG((hxgep, NDD2_CTL, " hxge_private_param_register %s",
324 HXGE_DEBUG_MSG((hxgep, NDD2_CTL,
326 return (hxge_check_txdma_port_member(hxgep, channel));
332 HXGE_DEBUG_MSG((hxgep, NDD2_CTL, "<== hxge_private_param_register"));
338 hxge_setup_param(p_hxge_t hxgep)
344 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_setup_param"));
349 hxge_param_arr[param_instance].value = hxgep->instance;
351 param_arr = hxgep->param_arr;
352 param_arr[param_instance].value = hxgep->instance;
354 for (i = 0; i < hxgep->param_count; i++) {
356 (hxge_private_param_register(hxgep, ¶m_arr[i]) ==
373 if (!hxge_nd_load(&hxgep->param_list, param_arr[i].name,
376 (void) hxge_nd_free(&hxgep->param_list);
381 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_setup_param"));
389 hxge_init_param(p_hxge_t hxgep)
395 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "==> hxge_init_param"));
400 hxge_param_arr[param_instance].value = hxgep->instance;
402 param_arr = hxgep->param_arr;
431 hxgep->param_arr = param_arr;
432 hxgep->param_count = sizeof (hxge_param_arr) / sizeof (hxge_param_t);
433 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "<== hxge_init_param: count %d",
434 hxgep->param_count));
441 hxge_destroy_param(p_hxge_t hxgep)
446 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "==> hxge_destroy_param"));
450 if (hxge_param_arr[param_instance].value == hxgep->instance) {
453 (i != hxgep->instance))
458 if (hxgep->param_list)
459 hxge_nd_free(&hxgep->param_list);
460 for (i = 0; i < hxgep->param_count; i++) {
461 if ((hxgep->param_arr[i].type & HXGE_PARAM_PROP_ARR32) ||
462 (hxgep->param_arr[i].type & HXGE_PARAM_PROP_ARR64)) {
463 free_count = ((hxgep->param_arr[i].type &
470 hxgep->param_arr[i].value, free_size);
472 hxgep->param_arr[i].old_value, free_size);
474 KMEM_FREE((void *) hxgep->param_arr[i].value,
476 KMEM_FREE((void *) hxgep->param_arr[i].old_value,
482 KMEM_FREE(hxgep->param_arr, sizeof (hxge_param_arr));
483 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "<== hxge_destroy_param"));
492 hxge_param_get_generic(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
496 HXGE_DEBUG_MSG((hxgep, NDD_CTL, " ==> hxge_param_get_generic name %s ",
505 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_generic"));
511 hxge_param_get_mac(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
515 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_mac"));
518 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_mac"));
524 hxge_param_get_rxdma_info(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
538 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_rxdma_info"));
551 p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config;
554 rx_rcr_rings = hxgep->rx_rcr_rings;
556 rx_rbr_rings = hxgep->rx_rbr_rings;
571 rdc, hxgep->rdc[rdc], (void *)rbr_rings[rdc],
576 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_rxdma_info"));
604 hxge_param_set_generic(p_hxge_t hxgep, queue_t *q, mblk_t *mp,
611 HXGE_DEBUG_MSG((hxgep, IOC_CTL, " ==> hxge_param_set_generic"));
618 HXGE_DEBUG_MSG((hxgep, IOC_CTL, " <== hxge_param_set_generic"));
624 hxge_param_set_mac(p_hxge_t hxgep, queue_t *q, mblk_t *mp,
632 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_mac"));
644 RW_ENTER_WRITER(&hxgep->filter_lock);
645 (void) hxge_rx_vmac_disable(hxgep);
646 (void) hxge_tx_vmac_disable(hxgep);
652 (void) hxge_tx_vmac_enable(hxgep);
653 (void) hxge_rx_vmac_enable(hxgep);
654 RW_EXIT(&hxgep->filter_lock);
657 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_mac"));
663 hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *q,
670 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_rx_intr_pkts"));
685 hxgep->intr_threshold = pa->value;
688 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_rx_intr_pkts"));
694 hxge_param_rx_intr_time(p_hxge_t hxgep, queue_t *q,
701 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_rx_intr_time"));
716 hxgep->intr_timeout = pa->value;
719 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_rx_intr_time"));
725 hxge_param_set_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, char *value,
740 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_vlan_ids "));
742 p_class_cfgp = (p_hxge_class_pt_cfg_t)&hxgep->class_config;
744 handle = hxgep->hpi_reg_handle;
769 HXGE_DEBUG_MSG((hxgep, NDD_CTL, " hxge_param_set_vlan_ids id %d",
800 HXGE_DEBUG_MSG((hxgep, NDD2_CTL,
816 HXGE_DEBUG_MSG((hxgep, NDD2_CTL,
828 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_vlan_ids"));
836 hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp)
848 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_vlan_ids "));
862 p_class_cfgp = (p_hxge_class_pt_cfg_t)&hxgep->class_config;
884 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_vlan_ids"));
891 hxge_param_tcam_enable(p_hxge_t hxgep, queue_t *q,
899 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_tcam_enable"));
909 status = hxge_pfc_config_tcam_enable(hxgep);
911 status = hxge_pfc_config_tcam_disable(hxgep);
915 HXGE_DEBUG_MSG((hxgep, NDD_CTL, " <== hxge_param_tcam_enable"));
921 hxge_param_set_ether_usr(p_hxge_t hxgep, queue_t *q,
928 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_ether_usr"));
942 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_ether_usr"));
947 hxge_class_name_2value(p_hxge_t hxgep, char *name)
953 param_arr = hxgep->param_arr;
964 hxge_param_set_ip_opt(p_hxge_t hxgep, queue_t *q,
973 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_ip_opt"));
989 class = hxge_class_name_2value(hxgep, pa->name);
993 status = hxge_pfc_ip_class_config(hxgep, class, pa->value);
997 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_ip_opt"));
1003 hxge_param_get_ip_opt(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp)
1009 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_ip_opt"));
1012 class = hxge_class_name_2value(hxgep, pa->name);
1016 status = hxge_pfc_ip_class_config_get(hxgep, class, &cfg_value);
1019 HXGE_DEBUG_MSG((hxgep, NDD_CTL,
1026 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_ip_opt status "));
1032 hxge_param_pfc_hash_init(p_hxge_t hxgep, queue_t *q, mblk_t *mp,
1040 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_pfc_hash_init"));
1050 HXGE_DEBUG_MSG((hxgep, NDD_CTL,
1059 status = hxge_pfc_set_hash(hxgep, (uint32_t)pa->value);
1063 HXGE_DEBUG_MSG((hxgep, NDD_CTL, " <== hxge_param_pfc_hash_init"));
1069 hxge_param_set_hxge_debug_flag(p_hxge_t hxgep, queue_t *q,
1078 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_hxge_debug_flag"));
1086 HXGE_DEBUG_MSG((hxgep, NDD_CTL,
1097 hxgep->hxge_debug_level = pa->value;
1099 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_hxge_debug_flag"));
1105 hxge_param_get_debug_flag(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
1110 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_debug_flag"));
1119 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_debug_flag"));
1125 hxge_param_set_hpi_debug_flag(p_hxge_t hxgep, queue_t *q,
1134 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_hpi_debug_flag"));
1142 HXGE_DEBUG_MSG((hxgep, NDD_CTL, " hxge_param_set_hpi_debug_flag"
1154 HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_debug_flag"));
1176 hxge_param_dump_ptrs(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
1191 HXGE_DEBUG_MSG((hxgep, IOC_CTL, "==> hxge_param_dump_ptrs"));
1203 p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config;
1206 rx_rcr_rings = hxgep->rx_rcr_rings;
1208 rx_rbr_rings = hxgep->rx_rbr_rings;
1211 "hxgep (hxge_t) $%p\n dev_regs (dev_regs_t) $%p\n",
1212 (void *)hxgep, (void *)hxgep->dev_regs);
1218 (void *)hxgep->dev_regs->hxge_regp,
1219 (void *)hxgep->dev_regs->hxge_pciregp);
1229 base = (uint64_t)(uint32_t)hxgep->dev_regs->hxge_regp;
1231 base = (uint64_t)hxgep->dev_regs->hxge_regp;
1257 tx_rings = hxgep->tx_rings->rings;
1267 HXGE_DEBUG_MSG((hxgep, IOC_CTL, "<== hxge_param_dump_ptrs"));
1347 hxge_nd_getset(p_hxge_t hxgep, queue_t *q, caddr_t param, p_mblk_t mp)
1421 err = (*nde->nde_get_pfi) (hxgep, q, mp1, nde->nde_data);
1455 err = (*nde->nde_set_pfi) (hxgep, q, mp1, valp,
1474 hxge_nd_get_names(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t param)
1513 hxge_get_default(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t data)
1520 hxge_set_default(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, char *value,
1527 hxge_param_ioctl(p_hxge_t hxgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp)
1532 HXGE_DEBUG_MSG((hxgep, IOC_CTL, "==> hxge_param_ioctl"));
1536 HXGE_DEBUG_MSG((hxgep, IOC_CTL,
1542 HXGE_DEBUG_MSG((hxgep, IOC_CTL,
1544 if (!hxge_nd_getset(hxgep, wq, hxgep->param_list, mp)) {
1545 HXGE_DEBUG_MSG((hxgep, IOC_CTL,
1558 HXGE_DEBUG_MSG((hxgep, IOC_CTL, "<== hxge_param_ioctl"));