Lines Matching defs:hxgep
36 hxge_fzc_intr_init(p_hxge_t hxgep)
40 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_fzc_intr_init"));
43 if ((status = hxge_fzc_intr_tmres_set(hxgep)) != HXGE_OK) {
51 if ((status = hxge_fzc_intr_ldg_num_set(hxgep)) != HXGE_OK) {
56 if ((status = hxge_fzc_intr_sid_set(hxgep)) != HXGE_OK) {
60 HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_fzc_intr_init"));
66 hxge_fzc_intr_ldg_num_set(p_hxge_t hxgep)
74 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_fzc_intr_ldg_num_set"));
76 if (hxgep->ldgvp == NULL) {
80 ldgp = hxgep->ldgvp->ldgp;
81 ldvp = hxgep->ldgvp->ldvp;
86 handle = HXGE_DEV_HPI_HANDLE(hxgep);
88 for (i = 0; i < hxgep->ldgvp->ldg_intrs; i++, ldgp++) {
89 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_fzc_intr_ldg_num_set "
97 HXGE_DEBUG_MSG((hxgep, INT_CTL,
103 HXGE_DEBUG_MSG((hxgep, INT_CTL,
109 HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_fzc_intr_ldg_num_set"));
114 hxge_fzc_intr_tmres_set(p_hxge_t hxgep)
119 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_fzc_intr_tmrese_set"));
120 if (hxgep->ldgvp == NULL) {
124 handle = HXGE_DEV_HPI_HANDLE(hxgep);
125 if ((rs = hpi_fzc_ldg_timer_res_set(handle, hxgep->ldgvp->tmres))) {
129 HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_fzc_intr_tmrese_set"));
134 hxge_fzc_intr_sid_set(p_hxge_t hxgep)
142 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_fzc_intr_sid_set"));
143 if (hxgep->ldgvp == NULL) {
144 HXGE_DEBUG_MSG((hxgep, INT_CTL,
149 handle = HXGE_DEV_HPI_HANDLE(hxgep);
150 ldgp = hxgep->ldgvp->ldgp;
151 HXGE_DEBUG_MSG((hxgep, INT_CTL,
152 "==> hxge_fzc_intr_sid_set: #int %d", hxgep->ldgvp->ldg_intrs));
153 for (i = 0; i < hxgep->ldgvp->ldg_intrs; i++, ldgp++) {
156 HXGE_DEBUG_MSG((hxgep, INT_CTL,
161 HXGE_DEBUG_MSG((hxgep, INT_CTL,
167 HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_fzc_intr_sid_set"));
176 hxge_init_fzc_rxdma_channel(p_hxge_t hxgep, uint16_t channel,
181 HXGE_DEBUG_MSG((hxgep, RX_CTL, "==> hxge_init_fzc_rxdma_channel"));
184 status = hxge_init_fzc_rxdma_channel_pages(hxgep, channel, rbr_p);
188 HXGE_DEBUG_MSG((hxgep, RX_CTL, "<== hxge_init_fzc_rxdma_channel"));
194 hxge_init_fzc_rxdma_channel_pages(p_hxge_t hxgep,
200 HXGE_DEBUG_MSG((hxgep, DMA_CTL,
203 handle = HXGE_DEV_HPI_HANDLE(hxgep);
211 HXGE_DEBUG_MSG((hxgep, DMA_CTL,
218 hxge_init_fzc_txdma_channel(p_hxge_t hxgep, uint16_t channel,
223 HXGE_DEBUG_MSG((hxgep, DMA_CTL, "==> hxge_init_fzc_txdma_channel"));
226 (void) hxge_init_fzc_txdma_channel_pages(hxgep, channel, tx_ring_p);
228 HXGE_DEBUG_MSG((hxgep, DMA_CTL, "<== hxge_init_fzc_txdma_channel"));
233 hxge_init_fzc_rx_common(p_hxge_t hxgep)
239 HXGE_DEBUG_MSG((hxgep, DMA_CTL, "==> hxge_init_fzc_rx_common"));
240 handle = HXGE_DEV_HPI_HANDLE(hxgep);
256 HXGE_DEBUG_MSG((hxgep, DMA_CTL,
262 hxge_init_fzc_txdma_channel_pages(p_hxge_t hxgep, uint16_t channel,
268 HXGE_DEBUG_MSG((hxgep, DMA_CTL,
271 handle = HXGE_DEV_HPI_HANDLE(hxgep);
284 hxge_fzc_sys_err_mask_set(p_hxge_t hxgep, boolean_t mask)
289 handle = HXGE_DEV_HPI_HANDLE(hxgep);