Cross Reference: /illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/ql

Lines Matching refs:RD32_IO_REG
2273 			stat = RD32_IO_REG(ha, risc2host);
11492 	    RD32_IO_REG(ha, ctrl_status) | FLASH_NVRAM_ACCESS_ERROR);
11498 		if (RD32_IO_REG(ha, flash_address) & FLASH_DATA_FLAG) {
11507 	} else if (RD32_IO_REG(ha, ctrl_status) & FLASH_NVRAM_ACCESS_ERROR) {
11512 	*bp = RD32_IO_REG(ha, flash_data);
11547 	    RD32_IO_REG(ha, ctrl_status) | FLASH_NVRAM_ACCESS_ERROR);
11550 	RD32_IO_REG(ha, flash_data);		/* PCI Posting. */
11555 		if ((RD32_IO_REG(ha, flash_address) & FLASH_DATA_FLAG) == 0) {
11572 	} else if (RD32_IO_REG(ha, ctrl_status) & FLASH_NVRAM_ACCESS_ERROR) {
11623 		    RD32_IO_REG(ha, ctrl_status) | ISP_FLASH_ENABLE);
11624 		RD32_IO_REG(ha, ctrl_status);	/* PCI Posting. */
11695 		    RD32_IO_REG(ha, ctrl_status) | ISP_FLASH_ENABLE);
11696 		RD32_IO_REG(ha, ctrl_status);	/* PCI Posting. */
11727 		    RD32_IO_REG(ha, ctrl_status) & ~ISP_FLASH_ENABLE);
11728 		RD32_IO_REG(ha, ctrl_status);	/* PCI Posting. */
13541 	fw->hccr = RD32_IO_REG(ha, hccr);
13544 	if ((RD32_IO_REG(ha, risc2host) & RH_RISC_PAUSED) == 0) {
13550 		    (RD32_IO_REG(ha, risc2host) & RH_RISC_PAUSED) == 0 &&
13567 		RD32_IO_REG(ha, ictrl);
13575 		RD32_IO_REG(ha, io_base_addr);
13978 	fw->r2h_status = RD32_IO_REG(ha, risc2host);
13981 	if ((RD32_IO_REG(ha, risc2host) & RH_RISC_PAUSED) == 0) {
13987 		    (RD32_IO_REG(ha, risc2host) & RH_RISC_PAUSED) == 0 &&
14027 		RD32_IO_REG(ha, ictrl);
14035 		RD32_IO_REG(ha, io_base_addr);
14515 	fw->r2h_status = RD32_IO_REG(ha, risc2host);
14518 	if ((RD32_IO_REG(ha, risc2host) & RH_RISC_PAUSED) == 0) {
14524 		    (RD32_IO_REG(ha, risc2host) & RH_RISC_PAUSED) == 0 &&
14564 		RD32_IO_REG(ha, ictrl);
14572 		RD32_IO_REG(ha, io_base_addr);
15102 					RD32_IO_REG(ha, hccr);
15115 			RD32_IO_REG(ha, hccr);