Lines Matching refs:ret_val
182 s32 ret_val = E1000_SUCCESS;
221 return ret_val;
236 s32 ret_val;
243 ret_val = e1000_read_pcie_cap_reg(hw, PCIE_LINK_STATUS,
245 if (ret_val) {
403 s32 ret_val;
409 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data);
410 if (ret_val)
411 return ret_val;
423 ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,
425 if (ret_val) {
427 return ret_val;
444 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
445 if (ret_val) {
447 return ret_val;
712 s32 ret_val;
729 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
730 if (ret_val)
731 return ret_val;
760 ret_val = e1000_config_fc_after_link_up_generic(hw);
761 if (ret_val)
764 return ret_val;
780 s32 ret_val;
813 ret_val = e1000_config_fc_after_link_up_generic(hw);
814 if (ret_val) {
816 return ret_val;
847 s32 ret_val;
878 ret_val = e1000_config_fc_after_link_up_generic(hw);
879 if (ret_val) {
881 return ret_val;
949 s32 ret_val;
965 ret_val = hw->nvm.ops.read(hw,
970 ret_val = hw->nvm.ops.read(hw,
976 if (ret_val) {
978 return ret_val;
1004 s32 ret_val;
1018 ret_val = e1000_set_default_fc_generic(hw);
1019 if (ret_val)
1020 return ret_val;
1032 ret_val = hw->mac.ops.setup_physical_interface(hw);
1033 if (ret_val)
1034 return ret_val;
1131 s32 ret_val;
1155 ret_val = mac->ops.check_for_link(hw);
1156 if (ret_val) {
1158 return ret_val;
1179 s32 ret_val;
1190 ret_val = e1000_commit_fc_settings_generic(hw);
1191 if (ret_val)
1192 return ret_val;
1212 ret_val = e1000_poll_fiber_serdes_link_generic(hw);
1217 return ret_val;
1354 s32 ret_val = E1000_SUCCESS;
1368 ret_val = e1000_force_mac_fc_generic(hw);
1371 ret_val = e1000_force_mac_fc_generic(hw);
1374 if (ret_val) {
1376 return ret_val;
1389 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
1390 if (ret_val)
1391 return ret_val;
1392 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
1393 if (ret_val)
1394 return ret_val;
1398 return ret_val;
1407 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,
1409 if (ret_val)
1410 return ret_val;
1411 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,
1413 if (ret_val)
1414 return ret_val;
1504 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
1505 if (ret_val) {
1507 return ret_val;
1516 ret_val = e1000_force_mac_fc_generic(hw);
1517 if (ret_val) {
1519 return ret_val;
1537 return ret_val;
1640 ret_val = e1000_force_mac_fc_generic(hw);
1641 if (ret_val) {
1643 return ret_val;
1816 s32 ret_val;
1820 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
1821 if (ret_val) {
1823 return ret_val;
1840 s32 ret_val;
1849 ret_val = hw->nvm.ops.valid_led_default(hw, &data);
1850 if (ret_val)
1851 return ret_val;