Lines Matching refs:state
271 * used to reset the PHY to a quiescent state when necessary.
329 /* It is not possible to be certain of the current state of ULP
414 * that the PHY is in a known good state before we read/write
423 * to quiesce to an accessible state before returning control
1252 * @to_sx: boolean indicating a system power state transition to Sx
2467 * e1000_configure_k1_ich8lan - Configure K1 power state
2469 * @enable: K1 state to configure
2471 * Configure the K1 power state based on the provided parameter.
2523 * @d0_state: boolean if entering d0 or d3 device state
3065 * leave the PHY in a bad state possibly resulting in no link.
3090 /* Allow time for h/w to get to quiescent state after reset */
3172 * e1000_set_lplu_state_pchlan - Set Low Power Link Up state
3176 * Sets the LPLU state according to the active flag. For PCH, if OEM write
3204 * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state
3208 * Sets the LPLU D0 state according to the active flag. When
3300 * e1000_set_d3_lplu_state_ich8lan - Set Low Power Linkup D3 state
3304 * Sets the LPLU D3 state according to the active flag. When
5162 /* Enable PHY low-power state when MAC is at D3 w/o WoL */
5502 * e1000_set_kmrn_lock_loss_workaround_ich8lan - Set Kumeran workaround state
5504 * @state: boolean value used to set the current Kumeran workaround state
5506 * If ICH8, set the current Kumeran workaround state (enabled - TRUE
5510 bool state)
5521 dev_spec->kmrn_lock_loss_workaround_enabled = state;
5695 * power good. LPI (Low Power Idle) state must also reset only