Lines Matching refs:ret_val
87 s32 ret_val = E1000_SUCCESS;
127 ret_val = phy->ops.reset(hw);
128 if (ret_val) {
135 ret_val = e1000_get_phy_id(hw);
136 if (ret_val)
143 ret_val = -E1000_ERR_PHY;
149 ret_val = -E1000_ERR_PHY;
154 ret_val = -E1000_ERR_PHY;
160 return ret_val;
386 bool ret_val;
391 ret_val = FALSE;
395 ret_val = dev_spec->init_phy_disabled;
398 return ret_val;
490 s32 ret_val = E1000_SUCCESS;
496 ret_val = -E1000_ERR_PARAM;
532 return ret_val;
546 s32 ret_val = E1000_SUCCESS;
552 ret_val = -E1000_ERR_PARAM;
579 return ret_val;
743 s32 ret_val;
747 ret_val = e1000_phy_force_speed_duplex_m88(hw);
748 if (ret_val)
753 ret_val = e1000_polarity_reversal_workaround_82543(hw);
756 return ret_val;
769 s32 ret_val = E1000_SUCCESS;
781 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
782 if (ret_val)
784 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
785 if (ret_val)
788 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
789 if (ret_val)
802 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
803 if (ret_val)
806 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
807 if (ret_val)
820 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
821 if (ret_val)
824 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
825 if (ret_val)
828 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
829 if (ret_val)
832 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
833 if (ret_val)
836 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
837 if (ret_val)
844 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);
845 if (ret_val)
849 return ret_val;
864 s32 ret_val;
890 ret_val = hw->phy.ops.get_cfg_done(hw);
892 return ret_val;
904 s32 ret_val = E1000_SUCCESS;
947 return ret_val;
961 s32 ret_val;
993 ret_val = mac->ops.setup_link(hw);
1003 return ret_val;
1022 s32 ret_val;
1035 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1036 if (ret_val) {
1038 ret_val = -E1000_ERR_NVM;
1046 ret_val = e1000_setup_link_generic(hw);
1049 return ret_val;
1063 s32 ret_val;
1078 ret_val = hw->phy.ops.reset(hw);
1079 if (ret_val)
1087 ret_val = e1000_copper_link_setup_m88(hw);
1088 if (ret_val)
1096 ret_val = e1000_copper_link_autoneg(hw);
1097 if (ret_val)
1105 ret_val = e1000_phy_force_speed_duplex_82543(hw);
1106 if (ret_val) {
1116 ret_val = e1000_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,
1118 if (ret_val)
1128 ret_val = e1000_config_mac_to_phy_82543(hw);
1129 if (ret_val)
1132 ret_val = e1000_config_fc_after_link_up_generic(hw);
1138 return ret_val;
1151 s32 ret_val;
1162 ret_val = e1000_commit_fc_settings_generic(hw);
1163 if (ret_val)
1178 ret_val = e1000_poll_fiber_serdes_link_generic(hw);
1183 return ret_val;
1201 s32 ret_val;
1208 ret_val = E1000_SUCCESS;
1212 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
1213 if (ret_val)
1238 ret_val = e1000_polarity_reversal_workaround_82543(hw);
1244 ret_val = -E1000_ERR_CONFIG;
1260 ret_val = e1000_config_mac_to_phy_82543(hw);
1261 if (ret_val) {
1273 ret_val = e1000_config_fc_after_link_up_generic(hw);
1274 if (ret_val)
1286 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
1287 if (ret_val) {
1289 return ret_val;
1323 return ret_val;
1337 s32 ret_val = E1000_SUCCESS;
1359 ret_val = 0;
1373 ret_val = e1000_config_fc_after_link_up_generic(hw);
1374 if (ret_val) {
1393 return ret_val;
1406 s32 ret_val = E1000_SUCCESS;
1423 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1424 if (ret_val)
1445 return ret_val;
1571 s32 ret_val = E1000_SUCCESS;
1578 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
1579 if (ret_val) {
1595 return ret_val;