Lines Matching refs:ret_val

88 	s32 ret_val;
110 ret_val = e1000_get_phy_id(hw);
111 if (ret_val)
116 ret_val = -E1000_ERR_PHY;
121 return ret_val;
131 s32 ret_val = E1000_SUCCESS;
182 ret_val = nvm->ops.read(hw, NVM_CFG, 1, &size);
183 if (ret_val)
212 return ret_val;
379 s32 ret_val;
384 ret_val = mac->ops.id_led_init(hw);
385 if (ret_val) {
391 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,
393 if (ret_val)
417 ret_val = mac->ops.setup_link(hw);
433 return ret_val;
448 s32 ret_val;
453 ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, duplex);
454 if (ret_val)
466 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data);
467 if (ret_val)
473 ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data);
474 if (ret_val)
487 return ret_val;
501 s32 ret_val;
506 ret_val = e1000_phy_hw_reset_generic(hw);
507 if (ret_val)
521 return ret_val;
537 s32 ret_val;
556 ret_val = e1000_copper_link_setup_igp(hw);
557 if (ret_val)
571 ret_val = e1000_setup_copper_link_generic(hw);
574 return ret_val;
587 s32 ret_val;
599 ret_val = E1000_SUCCESS;
608 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
609 if (ret_val)
613 ret_val = e1000_config_dsp_after_link_change_82541(hw, FALSE);
630 ret_val = -E1000_ERR_CONFIG;
634 ret_val = e1000_config_dsp_after_link_change_82541(hw, TRUE);
649 ret_val = e1000_config_fc_after_link_up_generic(hw);
650 if (ret_val)
654 return ret_val;
673 s32 ret_val;
686 ret_val = hw->mac.ops.get_link_up_info(hw, &speed, &duplex);
687 if (ret_val) {
693 ret_val = E1000_SUCCESS;
697 ret_val = phy->ops.get_cable_length(hw);
698 if (ret_val)
705 ret_val = phy->ops.read_reg(hw,
708 if (ret_val)
713 ret_val = phy->ops.write_reg(hw,
716 if (ret_val)
724 ret_val = E1000_SUCCESS;
729 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
730 if (ret_val)
735 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS,
737 if (ret_val)
744 ret_val = phy->ops.write_reg(hw,
747 if (ret_val)
762 ret_val = phy->ops.read_reg(hw, 0x2F5B,
764 if (ret_val)
768 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
769 if (ret_val)
774 ret_val = phy->ops.write_reg(hw, 0x0000,
776 if (ret_val)
779 ret_val = phy->ops.read_reg(hw,
782 if (ret_val)
788 ret_val = phy->ops.write_reg(hw,
791 if (ret_val)
795 ret_val = phy->ops.write_reg(hw, 0x0000,
797 if (ret_val)
803 ret_val = phy->ops.write_reg(hw, 0x2F5B,
805 if (ret_val)
812 ret_val = E1000_SUCCESS;
820 ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data);
821 if (ret_val)
825 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
826 if (ret_val)
831 ret_val = phy->ops.write_reg(hw, 0x0000,
833 if (ret_val)
836 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_DSP_FFE,
838 if (ret_val)
841 ret_val = phy->ops.write_reg(hw, 0x0000,
843 if (ret_val)
849 ret_val = phy->ops.write_reg(hw, 0x2F5B, phy_saved_data);
851 if (ret_val)
858 return ret_val;
875 s32 ret_val = E1000_SUCCESS;
888 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &data);
889 if (ret_val)
897 ret_val = -E1000_ERR_PHY;
928 return ret_val;
948 s32 ret_val;
958 ret_val = e1000_set_d3_lplu_state_generic(hw, active);
963 ret_val = phy->ops.read_reg(hw, IGP01E1000_GMII_FIFO, &data);
964 if (ret_val)
969 ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
970 if (ret_val)
980 ret_val = phy->ops.read_reg(hw,
983 if (ret_val)
987 ret_val = phy->ops.write_reg(hw,
990 if (ret_val)
993 ret_val = phy->ops.read_reg(hw,
996 if (ret_val)
1000 ret_val = phy->ops.write_reg(hw,
1003 if (ret_val)
1010 ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
1011 if (ret_val)
1015 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1017 if (ret_val)
1021 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1026 return ret_val;
1039 s32 ret_val;
1043 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,
1045 if (ret_val)
1048 ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,
1051 if (ret_val)
1057 return ret_val;
1070 s32 ret_val;
1074 ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,
1076 if (ret_val)
1082 return ret_val;
1094 u32 ret_val;
1100 ret_val = E1000_SUCCESS;
1111 ret_val = hw->phy.ops.read_reg(hw, 0x2F5B, &phy_saved_data);
1193 return ret_val;
1282 s32 ret_val = E1000_SUCCESS;
1289 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
1290 if (ret_val) {
1302 return ret_val;