Lines Matching defs:hw
46 static s32 e1000_init_phy_params_82541(struct e1000_hw *hw);
47 static s32 e1000_init_nvm_params_82541(struct e1000_hw *hw);
48 static s32 e1000_init_mac_params_82541(struct e1000_hw *hw);
49 static s32 e1000_reset_hw_82541(struct e1000_hw *hw);
50 static s32 e1000_init_hw_82541(struct e1000_hw *hw);
51 static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,
53 static s32 e1000_phy_hw_reset_82541(struct e1000_hw *hw);
54 static s32 e1000_setup_copper_link_82541(struct e1000_hw *hw);
55 static s32 e1000_check_for_link_82541(struct e1000_hw *hw);
56 static s32 e1000_get_cable_length_igp_82541(struct e1000_hw *hw);
57 static s32 e1000_set_d3_lplu_state_82541(struct e1000_hw *hw,
59 static s32 e1000_setup_led_82541(struct e1000_hw *hw);
60 static s32 e1000_cleanup_led_82541(struct e1000_hw *hw);
61 static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw);
62 static s32 e1000_read_mac_addr_82541(struct e1000_hw *hw);
63 static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
65 static s32 e1000_phy_init_script_82541(struct e1000_hw *hw);
66 static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw);
83 * @hw: pointer to the HW structure
85 static s32 e1000_init_phy_params_82541(struct e1000_hw *hw)
87 struct e1000_phy_info *phy = &hw->phy;
110 ret_val = e1000_get_phy_id(hw);
126 * @hw: pointer to the HW structure
128 static s32 e1000_init_nvm_params_82541(struct e1000_hw *hw)
130 struct e1000_nvm_info *nvm = &hw->nvm;
132 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
182 ret_val = nvm->ops.read(hw, NVM_CFG, 1, &size);
217 * @hw: pointer to the HW structure
219 static s32 e1000_init_mac_params_82541(struct e1000_hw *hw)
221 struct e1000_mac_info *mac = &hw->mac;
226 hw->phy.media_type = e1000_media_type_copper;
242 /* hw initialization */
277 * @hw: pointer to the HW structure
281 void e1000_init_function_pointers_82541(struct e1000_hw *hw)
285 hw->mac.ops.init_params = e1000_init_mac_params_82541;
286 hw->nvm.ops.init_params = e1000_init_nvm_params_82541;
287 hw->phy.ops.init_params = e1000_init_phy_params_82541;
292 * @hw: pointer to the HW structure
296 static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
303 E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
305 E1000_WRITE_REG(hw, E1000_RCTL, 0);
306 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
307 E1000_WRITE_FLUSH(hw);
315 ctrl = E1000_READ_REG(hw, E1000_CTRL);
318 if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
319 E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_PHY_RST));
320 E1000_WRITE_FLUSH(hw);
325 switch (hw->mac.type) {
333 E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
336 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
344 manc = E1000_READ_REG(hw, E1000_MANC);
346 E1000_WRITE_REG(hw, E1000_MANC, manc);
348 if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
349 e1000_phy_init_script_82541(hw);
352 ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
355 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
360 E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
363 E1000_READ_REG(hw, E1000_ICR);
370 * @hw: pointer to the HW structure
374 static s32 e1000_init_hw_82541(struct e1000_hw *hw)
376 struct e1000_mac_info *mac = &hw->mac;
377 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
384 ret_val = mac->ops.id_led_init(hw);
391 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,
398 mac->ops.clear_vfta(hw);
401 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
406 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
413 E1000_WRITE_FLUSH(hw);
417 ret_val = mac->ops.setup_link(hw);
419 txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
422 E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
430 e1000_clear_hw_cntrs_82541(hw);
438 * @hw: pointer to the HW structure
444 static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,
447 struct e1000_phy_info *phy = &hw->phy;
453 ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, duplex);
466 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data);
473 ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data);
492 * @hw: pointer to the HW structure
499 static s32 e1000_phy_hw_reset_82541(struct e1000_hw *hw)
506 ret_val = e1000_phy_hw_reset_generic(hw);
510 e1000_phy_init_script_82541(hw);
512 if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
514 ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
517 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
526 * @hw: pointer to the HW structure
533 static s32 e1000_setup_copper_link_82541(struct e1000_hw *hw)
535 struct e1000_phy_info *phy = &hw->phy;
536 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
542 ctrl = E1000_READ_REG(hw, E1000_CTRL);
545 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
549 if (hw->mac.type == e1000_82541 || hw->mac.type == e1000_82547) {
556 ret_val = e1000_copper_link_setup_igp(hw);
560 if (hw->mac.autoneg) {
566 ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
569 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
571 ret_val = e1000_setup_copper_link_generic(hw);
579 * @hw: pointer to the HW structure
582 * results in the hw->mac structure.
584 static s32 e1000_check_for_link_82541(struct e1000_hw *hw)
586 struct e1000_mac_info *mac = &hw->mac;
608 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
613 ret_val = e1000_config_dsp_after_link_change_82541(hw, FALSE);
623 e1000_check_downshift_generic(hw);
634 ret_val = e1000_config_dsp_after_link_change_82541(hw, TRUE);
641 mac->ops.config_collision_dist(hw);
649 ret_val = e1000_config_fc_after_link_up_generic(hw);
659 * @hw: pointer to the HW structure
668 static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
671 struct e1000_phy_info *phy = &hw->phy;
672 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
686 ret_val = hw->mac.ops.get_link_up_info(hw, &speed, &duplex);
697 ret_val = phy->ops.get_cable_length(hw);
705 ret_val = phy->ops.read_reg(hw,
713 ret_val = phy->ops.write_reg(hw,
729 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
735 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS,
744 ret_val = phy->ops.write_reg(hw,
762 ret_val = phy->ops.read_reg(hw, 0x2F5B,
768 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
774 ret_val = phy->ops.write_reg(hw, 0x0000,
779 ret_val = phy->ops.read_reg(hw,
788 ret_val = phy->ops.write_reg(hw,
795 ret_val = phy->ops.write_reg(hw, 0x0000,
803 ret_val = phy->ops.write_reg(hw, 0x2F5B,
820 ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data);
825 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
831 ret_val = phy->ops.write_reg(hw, 0x0000,
836 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_DSP_FFE,
841 ret_val = phy->ops.write_reg(hw, 0x0000,
849 ret_val = phy->ops.write_reg(hw, 0x2F5B, phy_saved_data);
863 * @hw: pointer to the HW structure
872 static s32 e1000_get_cable_length_igp_82541(struct e1000_hw *hw)
874 struct e1000_phy_info *phy = &hw->phy;
888 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &data);
933 * @hw: pointer to the HW structure
945 static s32 e1000_set_d3_lplu_state_82541(struct e1000_hw *hw, bool active)
947 struct e1000_phy_info *phy = &hw->phy;
953 switch (hw->mac.type) {
958 ret_val = e1000_set_d3_lplu_state_generic(hw, active);
963 ret_val = phy->ops.read_reg(hw, IGP01E1000_GMII_FIFO, &data);
969 ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
980 ret_val = phy->ops.read_reg(hw,
987 ret_val = phy->ops.write_reg(hw,
993 ret_val = phy->ops.read_reg(hw,
1000 ret_val = phy->ops.write_reg(hw,
1010 ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
1015 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1021 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1031 * @hw: pointer to the HW structure
1036 static s32 e1000_setup_led_82541(struct e1000_hw *hw)
1038 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1043 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,
1048 ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,
1054 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);
1062 * @hw: pointer to the HW structure
1067 static s32 e1000_cleanup_led_82541(struct e1000_hw *hw)
1069 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1074 ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,
1079 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
1087 * @hw: pointer to the HW structure
1091 static s32 e1000_phy_init_script_82541(struct e1000_hw *hw)
1093 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1111 ret_val = hw->phy.ops.read_reg(hw, 0x2F5B, &phy_saved_data);
1114 hw->phy.ops.write_reg(hw, 0x2F5B, 0x0003);
1118 hw->phy.ops.write_reg(hw, 0x0000, 0x0140);
1122 switch (hw->mac.type) {
1125 hw->phy.ops.write_reg(hw, 0x1F95, 0x0001);
1127 hw->phy.ops.write_reg(hw, 0x1F71, 0xBD21);
1129 hw->phy.ops.write_reg(hw, 0x1F79, 0x0018);
1131 hw->phy.ops.write_reg(hw, 0x1F30, 0x1600);
1133 hw->phy.ops.write_reg(hw, 0x1F31, 0x0014);
1135 hw->phy.ops.write_reg(hw, 0x1F32, 0x161C);
1137 hw->phy.ops.write_reg(hw, 0x1F94, 0x0003);
1139 hw->phy.ops.write_reg(hw, 0x1F96, 0x003F);
1141 hw->phy.ops.write_reg(hw, 0x2010, 0x0008);
1145 hw->phy.ops.write_reg(hw, 0x1F73, 0x0099);
1151 hw->phy.ops.write_reg(hw, 0x0000, 0x3300);
1156 hw->phy.ops.write_reg(hw, 0x2F5B, phy_saved_data);
1158 if (hw->mac.type == e1000_82547) {
1162 hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS,
1166 hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_FUSE_STATUS,
1183 hw->phy.ops.write_reg(hw,
1186 hw->phy.ops.write_reg(hw,
1198 * @hw: pointer to the HW structure
1204 void e1000_init_script_state_82541(struct e1000_hw *hw, bool state)
1206 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1210 if (hw->phy.type != e1000_phy_igp) {
1223 * @hw: pointer to the HW structure
1228 static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw)
1231 if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_SMBUS_EN))
1232 e1000_power_down_phy_copper(hw);
1239 * @hw: pointer to the HW structure
1243 static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw)
1247 e1000_clear_hw_cntrs_base_generic(hw);
1249 E1000_READ_REG(hw, E1000_PRC64);
1250 E1000_READ_REG(hw, E1000_PRC127);
1251 E1000_READ_REG(hw, E1000_PRC255);
1252 E1000_READ_REG(hw, E1000_PRC511);
1253 E1000_READ_REG(hw, E1000_PRC1023);
1254 E1000_READ_REG(hw, E1000_PRC1522);
1255 E1000_READ_REG(hw, E1000_PTC64);
1256 E1000_READ_REG(hw, E1000_PTC127);
1257 E1000_READ_REG(hw, E1000_PTC255);
1258 E1000_READ_REG(hw, E1000_PTC511);
1259 E1000_READ_REG(hw, E1000_PTC1023);
1260 E1000_READ_REG(hw, E1000_PTC1522);
1262 E1000_READ_REG(hw, E1000_ALGNERRC);
1263 E1000_READ_REG(hw, E1000_RXERRC);
1264 E1000_READ_REG(hw, E1000_TNCRS);
1265 E1000_READ_REG(hw, E1000_CEXTERR);
1266 E1000_READ_REG(hw, E1000_TSCTC);
1267 E1000_READ_REG(hw, E1000_TSCTFC);
1269 E1000_READ_REG(hw, E1000_MGTPRC);
1270 E1000_READ_REG(hw, E1000_MGTPDC);
1271 E1000_READ_REG(hw, E1000_MGTPTC);
1276 * @hw: pointer to the HW structure
1280 static s32 e1000_read_mac_addr_82541(struct e1000_hw *hw)
1289 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
1294 hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);
1295 hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8);
1299 hw->mac.addr[i] = hw->mac.perm_addr[i];