Lines Matching refs:t4_write_reg
277 t4_write_reg(sc, A_SGE_FL_BUFFER_SIZE0, rx_buf_size);
279 t4_write_reg(sc, A_SGE_INGRESS_RX_THRESHOLD,
285 t4_write_reg(sc, A_SGE_TIMER_VALUE_0_AND_1,
288 t4_write_reg(sc, A_SGE_TIMER_VALUE_2_AND_3,
291 t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5,
664 t4_write_reg(sc, MYPF_REG(A_PCIE_PF_CLI), 0);
752 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
788 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(ndescs) |
1222 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_SEINTARM(iq->intr_params) |
2823 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
3004 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL), F_DBPRIO |