Lines Matching defs:pi

49 static int begin_synchronized_op(struct port_info *pi, int hold, int waitok);
50 static void end_synchronized_op(struct port_info *pi, int held);
51 static int t4_init_synchronized(struct port_info *pi);
52 static int t4_uninit_synchronized(struct port_info *pi);
53 static void propinfo(struct port_info *pi, const char *name,
55 static int getprop(struct port_info *pi, const char *name, uint_t size,
57 static int setprop(struct port_info *pi, const char *name, const void *val);
99 struct port_info *pi = arg;
100 struct adapter *sc = pi->adapter;
101 struct link_config *lc = &pi->link_cfg;
104 t4_read_reg64(sc, PORT_REG(pi->tx_chan, A_MPS_PORT_STAT_##name##_L))
318 cxgb_printf(pi->dip, CE_NOTE, "stat %d not implemented.", stat);
330 struct port_info *pi = arg;
333 rc = begin_synchronized_op(pi, 0, 1);
336 rc = t4_init_synchronized(pi);
337 end_synchronized_op(pi, 0);
345 struct port_info *pi = arg;
347 while (begin_synchronized_op(pi, 0, 1) != 0)
349 (void) t4_uninit_synchronized(pi);
350 end_synchronized_op(pi, 0);
356 struct port_info *pi = arg;
357 struct adapter *sc = pi->adapter;
360 rc = begin_synchronized_op(pi, 1, 1);
363 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, -1, on ? 1 : 0, -1, -1, -1,
365 end_synchronized_op(pi, 1);
377 struct port_info *pi = arg;
378 struct adapter *sc = pi->adapter;
385 F_FW_CMD_WRITE | V_FW_VI_MAC_CMD_VIID(pi->viid));
392 rc = begin_synchronized_op(pi, 1, 1);
396 end_synchronized_op(pi, 1);
409 cxgb_printf(pi->dip, CE_NOTE,
422 struct port_info *pi = arg;
423 struct adapter *sc = pi->adapter;
426 rc = begin_synchronized_op(pi, 1, 1);
429 rc = t4_change_mac(sc, sc->mbox, pi->viid, pi->xact_addr_filt, ucaddr,
435 pi->xact_addr_filt = rc;
438 end_synchronized_op(pi, 1);
446 struct port_info *pi = arg;
447 struct adapter *sc = pi->adapter;
448 struct sge_txq *txq = &sc->sge.txq[pi->first_txq];
450 return (t4_eth_tx(pi, txq, m));
456 struct port_info *pi = arg;
461 if (pi->features & CXGBE_HW_CSUM) {
470 if (pi->features & CXGBE_HW_LSO &&
471 pi->features & CXGBE_HW_CSUM) {
492 struct port_info *pi = arg;
493 struct adapter *sc = pi->adapter;
494 struct link_config lc_copy, *lc = &pi->link_cfg;
540 } else if (v32 != pi->mtu) {
541 pi->mtu = v32;
542 (void) mac_maxsdu_update(pi->mh, v32);
567 if (lc->supported & FW_PORT_CAP_ANEG && is_10G_port(pi)) {
610 rc = setprop(pi, name, val);
617 if (isset(&sc->open_device_map, pi->port_id) != 0) {
619 t4_os_link_changed(pi->adapter, pi->port_id, 0);
620 rc = begin_synchronized_op(pi, 1, 1);
623 rc = -t4_link_start(sc, sc->mbox, pi->tx_chan,
624 &pi->link_cfg);
625 end_synchronized_op(pi, 1);
627 cxgb_printf(pi->dip, CE_WARN,
637 rc = begin_synchronized_op(pi, 1, 1);
640 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, v32, -1,
642 end_synchronized_op(pi, 1);
644 cxgb_printf(pi->dip, CE_WARN,
657 struct port_info *pi = arg;
658 struct link_config *lc = &pi->link_cfg;
685 *(uint32_t *)val = pi->mtu;
716 return (getprop(pi, name, size, val));
729 struct port_info *pi = arg;
730 struct link_config *lc = &pi->link_cfg;
785 propinfo(pi, name, ph);
794 begin_synchronized_op(struct port_info *pi, int hold, int waitok)
796 struct adapter *sc = pi->adapter;
800 while (!IS_DOOMED(pi) && IS_BUSY(sc)) {
809 if (IS_DOOMED(pi) != 0) { /* shouldn't happen on Solaris */
827 end_synchronized_op(struct port_info *pi, int held)
829 struct adapter *sc = pi->adapter;
843 t4_init_synchronized(struct port_info *pi)
845 struct adapter *sc = pi->adapter;
850 if (isset(&sc->open_device_map, pi->port_id) != 0)
857 if (!(pi->flags & PORT_INIT_DONE)) {
858 rc = port_full_init(pi);
862 enable_port_queues(pi);
864 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, pi->mtu, 0, 0, 1, 0, false);
866 cxgb_printf(pi->dip, CE_WARN, "set_rxmode failed: %d", rc);
869 rc = t4_change_mac(sc, sc->mbox, pi->viid, pi->xact_addr_filt,
870 pi->hw_addr, true, true);
872 cxgb_printf(pi->dip, CE_WARN, "change_mac failed: %d", rc);
877 pi->xact_addr_filt = rc;
879 rc = -t4_link_start(sc, sc->mbox, pi->tx_chan, &pi->link_cfg);
881 cxgb_printf(pi->dip, CE_WARN, "start_link failed: %d", rc);
885 rc = -t4_enable_vi(sc, sc->mbox, pi->viid, true, true);
887 cxgb_printf(pi->dip, CE_WARN, "enable_vi failed: %d", rc);
892 setbit(&sc->open_device_map, pi->port_id);
895 (void) t4_uninit_synchronized(pi);
904 t4_uninit_synchronized(struct port_info *pi)
906 struct adapter *sc = pi->adapter;
918 rc = -t4_enable_vi(sc, sc->mbox, pi->viid, false, false);
920 cxgb_printf(pi->dip, CE_WARN, "disable_vi failed: %d", rc);
924 disable_port_queues(pi);
926 clrbit(&sc->open_device_map, pi->port_id);
928 pi->link_cfg.link_ok = 0;
929 pi->link_cfg.speed = 0;
930 mac_link_update(pi->mh, LINK_STATE_UNKNOWN);
936 propinfo(struct port_info *pi, const char *name, mac_prop_info_handle_t ph)
938 struct adapter *sc = pi->adapter;
940 struct link_config *lc = &pi->link_cfg;
945 v = is_10G_port(pi) ? p->tmr_idx_10g : p->tmr_idx_1g;
947 v = is_10G_port(pi) ? p->pktc_idx_10g : p->pktc_idx_1g;
949 v = (pi->features & CXGBE_HW_CSUM) ? 1 : 0;
951 v = (pi->features & CXGBE_HW_LSO) ? 1 : 0;
968 getprop(struct port_info *pi, const char *name, uint_t size, void *val)
970 struct link_config *lc = &pi->link_cfg;
974 v = pi->tmr_idx;
976 v = pi->pktc_idx;
978 v = (pi->features & CXGBE_HW_CSUM) ? 1 : 0;
980 v = (pi->features & CXGBE_HW_LSO) ? 1 : 0;
987 v = pi->mtu;
997 setprop(struct port_info *pi, const char *name, const void *val)
999 struct adapter *sc = pi->adapter;
1003 struct link_config lc_old, *lc = &pi->link_cfg;
1016 if (v == pi->tmr_idx)
1020 pi->tmr_idx = v;
1021 for_each_rxq(pi, i, rxq) {
1023 V_QINTR_CNT_EN(pi->pktc_idx >= 0);
1029 if (v == pi->pktc_idx || (v < 0 && pi->pktc_idx == -1))
1033 pi->pktc_idx = v < 0 ? -1 : v;
1034 for_each_rxq(pi, i, rxq) {
1035 rxq->iq.intr_params = V_QINTR_TIMER_IDX(pi->tmr_idx) |
1045 pi->features |= CXGBE_HW_CSUM;
1047 pi->features &= ~CXGBE_HW_CSUM;
1052 pi->features |= CXGBE_HW_LSO;
1054 pi->features &= ~CXGBE_HW_LSO;
1081 if (v == pi->mtu)
1084 pi->mtu = (int)v;
1085 (void) mac_maxsdu_update(pi->mh, v);
1096 if (isset(&sc->open_device_map, pi->port_id) != 0) {
1098 rc = begin_synchronized_op(pi, 1, 1);
1101 rc = -t4_link_start(sc, sc->mbox, pi->tx_chan, lc);
1102 end_synchronized_op(pi, 1);
1104 cxgb_printf(pi->dip, CE_WARN,
1110 rc = begin_synchronized_op(pi, 1, 1);
1113 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, v, -1, -1,
1115 end_synchronized_op(pi, 1);
1117 cxgb_printf(pi->dip, CE_WARN,
1128 t4_mc_init(struct port_info *pi)
1130 pi->mc = &t4_m_callbacks;
1131 pi->props = t4_priv_props;
1137 struct port_info *pi = sc->port[idx];
1139 mac_link_update(pi->mh, link_stat ? LINK_STATE_UP : LINK_STATE_DOWN);
1144 t4_mac_rx(struct port_info *pi, struct sge_rxq *rxq, mblk_t *m)
1146 mac_rx(pi->mh, NULL, m);